Abstract
In complex reconfigurable SoCs, the dynamism of applications requires an efficient management of the platform. To allow run-time allocation of resources, operating systems and reconfigurable SoC platforms should be developed together. The operating system requires hardware support from the platform to abstract the reconfigurable resources and to provide an efficient communication layer. This paper presents our work on interconnection networks which are used as hardware support for the operating system. We show how multiple networks interface to the reconfigurable resources, allow dynamic task relocation and extend OS-control to the platform. An FPGA implementation of these networks supports the concepts we describe.
Part of this research has been funded by the European Commission through the IST-AMDREL project (IST-2001-34379) and by Xilinx Labs, Xilinx Inc. R&D group.
D. Verkest: Also Professor at Vrije Universiteit Brussel Also Professor at Katholieke Universiteit Leuven
R. Lauwereins: Also Professor at Katholieke Universiteit Leuven
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Nollet, V., Coene, P., Verkest, D., Vernalde, S., Lauwereins, R.: Designing an Operating System for a Heterogeneous Reconfigurable SoC. In: Proc. RAW 2003 workshop, Nice (April 2003)
Marescaux, T., Bartic, A., Verkest, D., Vernalde, S., Lauwereins, R.: Interconnection Networks Enable Fine-Grain Dynamic Multi-Tasking on FPGAs. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, pp. 795–805. Springer, Heidelberg (2002)
Mignolet, J.-Y., Nollet, V., Coene, P., Verkest, D., Vernalde, S., Lauwereins, R.: Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. In: Proc. DATE 2003, Munich, March 2003, pp. 986–992 (2003)
Blodget, B., McMillan, S., Lysaght, P.: A Lightweight Approach for Embedded Reconfiguration of FPGAs. In: Proc. DATE 2003, Munich, March 2003, pp. 399–400 (2003)
Rijpkema, E., et al.: Trade Offs in the Design of a Router with both Guaranteed and Best-Effort Services for Networks On Chip. In: Proc. DATE 2003, Munich, March 2003, pp. 350–355 (2003)
Simmler, H., Levinson, L., Männer, R.: Multitasking on FPGA Coprocessors. In: Grünbacher, H., Hartenstein, R.W. (eds.) FPL 2000. LNCS, vol. 1896, pp. 121–130. Springer, Heidelberg (2000)
Dally, W.J., Towles, B.: Route Packets, Not Wires: On-Chip Interconnection Networks. In: Proc. 38th Design Automation Conference (June 2001)
Duato, J., Yalamanchili, S., Ni, L.: Interconnection Networks. An Engineering Approach (September 1997) ISBN 0-8186-7800-3
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2003 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Marescaux, T. et al. (2003). Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_58
Download citation
DOI: https://doi.org/10.1007/978-3-540-45234-8_58
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-40822-2
Online ISBN: 978-3-540-45234-8
eBook Packages: Springer Book Archive