Abstract
The use of FPGA based custom computing platforms is proposed for implementing linearly structured Genetic Programs. Such a context enables consideration of micro architectural and instruction design issues not normally possible when using classical Von Neumann machines. More importantly, the desirability of minimising memory management overheads results in the imposition of additional constraints to the crossover operator. Specifically, individuals are described in terms of the number of pages and page length, where the page length is common across individuals of the population. Pairwise crossover therefore results in the swapping of equal length pages, hence minimising memory overheads. Simulation of the approach demonstrates that the method warrants further study.
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References
Cramer, N.L.: A Representation for Adaptive Generation of Simple Sequential Programs. In: Proc. 1st Int. Conf. on Genetic Algorithms and their Applications, pp. 183–187 (1985)
Nordin, L.P.: A Compiling Genetic Programming system that directly manipulates the machine code. In: Kinnear Jr., K.E. (ed.) Advances in Genetic Programming, vol. 1, ch. 14, pp. 311–331. MIT Press, Cambridge (1994)
Perkis, T.: Stack Based Genetic Programming. In: Proc. IEEE Congress on Computational Intelligence. IEEE Press, Los Alamitos (1994)
Nordin, J.P., Banzhaf, W.: Evolving Turning Complete Programs for a Register Machine with Self-Modifying code. In: Proc. 6th Int. Conf. on Genetic Programming, pp. 318–325. Morgan Kaufmann, San Fransisco (1995)
Nordin, J.P.: Evolutionary Program Induction of Binary Machine Code and its Applications. Corrected Edition. Krehl Verlag (1999) IBSN 3-931546-07-1
Nordin, J.P., Banzhaf, W., Francone, F.D.: Efficient Evolution of Machine Code for CISC Architectures. In: Spector, L., Langdon, W.B., O’Reilly, U.-M., Angeline, P.J. (eds.) Advances in Genetic Programming, vol. 3, ch. 12, pp. 275–299. MIT Press, Cambridge (1999)
Yao, X., Higuchi, T.: Promises and Challenges of Evolvable Hardware. IEEE Trans. on Systems Man and Cybernetics - Part C: Applications and reviews 29(1), 87–97 (1999)
Thompson, A.: Hardware Evolution: Automatic Design of Electronic Circuits in Reconfigurable Hardware by Artificial Evolution. Springer, Heidelberg (1998) ISBN 3-540-76253-1
Levi, D., Guccione, S.A.: GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices. In: Proceedings of the 1st NASA/ DoD Workshop on Evolvable Hardware, pp. 12–17 (1999)
Mano, M.M.: Computer System Architecture, 3rd edn. Prentice-Hall, Englewood Cliffs (1993) IBSN 0-13-175563-3
Heywood, M.I., Zincir-Heywood, N.A.: Reconfigurable Computing - Facilitating Micro-operation Design? In: Bilisim 1999, Istanbul, pp. 77–82 (1999)
Koza, J.R., et al.: Evolving Computer Programs using Reconfigurable FPGAs and Genetic Programming. In: ACM Symposium on Field Programmable Gate Arrays, pp. 209–219 (1997)
Dandalis, A., Mei, A., Prasanna, V.K.: Domain Specific Mapping for Solving Graph Problems on Reconfigurable Devices. In: Proceedings of the 9th International Workshop on FPGAs and Applications (1999)
Chaudhuari, A.S., Cheung, P.Y.K., Luk, W.: A Reconfigurable Data-Localised Array for Morphological Operations. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds.) FPL 1997. LNCS, vol. 1304. Springer, Heidelberg (1997)
Porter, R., McCabe, K., Bergmann, N.: An Application Approach to Evolvable Hardware. In: Proceedings of the 1st NASA/ DoD Workshop on Evolvable Hardware, pp. 170–174 (1999)
Chellapilla, K.: Evolving Computer Programs without subtree Crossover. IEEE Trans. on Evolutionary Computation 1(3), 209–216 (1997)
Koza, J.R.: Genetic Programming: Automatic Discovery of Reusable Programmes. The MIT Press, Cambridge (1994)
Duell, D.A., et al.: Splash 2: FPGAs in a Custom Computing Machine. IEEE Computer Society Press, Los Alamitos (1996) ISBN 0-8186-7413-X
Vuillemin, J.E., et al.: Programmable Active Memories: Reconfigurable Systems Come of Age. IEEE Transactions on Very Large Scale Integration Systems 4(1), 56–69 (1996)
Kamal, A.K., Singh, H., Agrawal, D.: A Generalised Pipeline Array. IEEE Transactions on Computers 23, 533–536 (1974)
Kung, T.H.: Why Systolic Architectures. IEEE Computer 15(1), 37–46 (1982)
Kelem, S.: VirtexTM Configuration Architecture Advanced User’s Guide. Xilinx® Application note XAPP151. Version 1.2 (1999)
Koza, J.R.: Genetic Programming: On the Programming of Computers by Means of Natural Selection. The MIT Press, Cambridge (1992)
Daida, J.M., Bertram, R.R., Polito, J.A., Stenhope, S.A.: Analysis of Single-Node (Building) Blocks in Genetic Programming. In: Spector, L., Langdon, W.B., O’Reilly, U.-M., Angeline, P.J. (eds.) Advances in Genetic Programming, vol. 3, ch. 10, pp. 216–241. MIT Press, Cambridge (1999)
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Heywood, M.I., Zincir-Heywood, A.N. (2000). Register Based Genetic Programming on FPGA Computing Platforms. In: Poli, R., Banzhaf, W., Langdon, W.B., Miller, J., Nordin, P., Fogarty, T.C. (eds) Genetic Programming. EuroGP 2000. Lecture Notes in Computer Science, vol 1802. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-46239-2_4
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