Abstract
This paper discusses methods and software tools that we have developed for the specification, verification, implementation and debugging of control circuits. The specification method that we have adopted is based on the use of Hierarchical Graph-Schemes. The circuit implementation model is a Hierarchical Finite State Machine, which supports the top-down decomposition of the control algorithms. The application input/output interface provides links with other external tools that perform synthesis and implementation tasks. Some of the utilities we have developed, such as the random control algorithm generator, allow many useful supplementary tasks to be handled and provide powerful assistance for experiments. In particular, the tools have been used to implement Hierarchical Finite State Machines in the Xilinx XC6200 dynamically reconfigurable FPGAs.
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References
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© 1999 Springer-Verlag Berlin Heidelberg
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Oliveira, A., Melo, A., Sklyarov, V. (1999). Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_32
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DOI: https://doi.org/10.1007/978-3-540-48302-1_32
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-66457-4
Online ISBN: 978-3-540-48302-1
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