Abstract
This paper introduces a new approach in the debugging of hardware designs. The design is given as a VHDL program and converted in a component connection model. The conversion is similar to the synthesis of register transfer into gate level programs. The resulting model is directly used for locating faults within the design. To do this, we propose the application of model-based diagnosis. The advantage of this approach is its degree of automation and that it can be applied even on today’s mid-size to large size programs.
The work presented in this paper has been partially funded by Siemens Austria under research grant DDV GR 21/96106/4 and the Austrian Science Fund Project N Z29-INF.
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Wotawa, F. (1999). New Directions in Debugging Hardware Designs. In: Imam, I., Kodratoff, Y., El-Dessouki, A., Ali, M. (eds) Multiple Approaches to Intelligent Systems. IEA/AIE 1999. Lecture Notes in Computer Science(), vol 1611. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48765-4_26
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DOI: https://doi.org/10.1007/978-3-540-48765-4_26
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-66076-7
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