Abstract
The extensive usage of embedded systems involves running complex applications that require tightly limited resources such as memory and storage. One efficient way to satisfy the resource requirements is to reduce the code size through code compression. Our work describes a software-based code compression scheme that reduces the storage space of a program, which in turn induces a reduction of access time to off-chip memory in SoC (System-on-a-chip) embedded architectures. To select those sections of code that are most advantageous for compression, our scheme utilizes profiling information to evaluate and trade off storage space reduction for future run-time overhead. During run-time, the compressed parts are decompressed as necessary into a run-time buffer for execution. Experimental results on the SPEC CPU2000 and MediaBench suites show reduction in code size averaging 18.5%, along with reasonable memory consumption overhead averaging 3.8%, and a reasonable run-time overhead averaging 7.8%.
This paper extends the Computing Frontiers 2006 paper [24] with new performance results comparing different compression techniques, and additional discussions.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Bell, T., Cleary, J., Witten, I.: Text compression. Prentice-Hall, Englewood Cliffs (1990)
Benes, M., Nowick, S.M., Wolfe, A.: A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors. In: Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and System, March, pp. 43–57 (1998)
Benini, L., Macii, A., Macii, E., Poncino, M.: Selective instruction compression for memory energy reduction in embedded systems. In: Proceedings of the International Symposium on Low Power Electronics and Design, August, pp. 206–211 (1999)
Benini, L., Macii, A., Poncino, M.: Energy-Aware Design of Embedded Memories: A Survey of Technologies, Architectures, and Optimization Techniques. ACM Transactions on Embedded Computing Systems (TECS) 2(Issue 1), 5–32 (2003)
Debray, S., Evans, W.: Profile-Guided Code Compression. In: Proceedings of the conference on Programming Language Design and Implementation, June, pp. 95–105 (2002)
Game, M., Booker, A.: CodePack: Code Compression for PowerPC Processors. MicroNews 5(1) (1999)
Kirovski, D., Kin, J., Mangion-Smith, W.H.: Procedure Based Program Compression. In: Proceedings of the International Symposium on Microarchitecture, December, pp. 204–217 (1997)
Kozuch, M., Wolfe, A.: Compression of Embedded Systems Programs. In: Proceedings of the IEEE International Conference on Computer Design: VLSI in Computer & Processors, October, pp. 270–277. IEEE Computer Society Press, Los Alamitos (1994)
Lefurgy, C., Bird, P., Chen, I.-C., Mudge, T.: Improving Code Density Using Compression Techniques. In: Proceedings of the International Symposium on Microarchitecture, December, pp. 194–203 (1997)
Lefurgy, C., Piccininni, E., Mudge, T.: Reducing Code Size with Run-time Decompression. In: Proceedings of the International Symposium on High Performance Computer Architecture, January, p. 218 (2000)
Lekatsas, H., Wolf, W.: Code Compression for embedded Systems. In: Proceedings of the Conference on Design Automation, June, pp. 516–521 (1998)
Lekatsas, H., Wolf, W.: Random Access Decompression using Binary Arithmetic Coding. In: Proceedings of IEEE Data Compression Conference, March, pp. 306–315. IEEE Computer Society Press, Los Alamitos (1999)
Lekatsas, H., Henkel, J., Wolf, W.: Arithmetic coding for low power embedded system design. In: Proceedings of the Conference on Data Compression, March, p. 430 (2000)
Lekatsas, H., Henkel, J., Wolf, W.: Code compression for low power embedded system design. In: Proceedings of Design Automation Conference, June, pp. 294–299 (2000a)
Liao, S., Devadas, S., Keutzer, K.: Code Density Optimization for Embedded DSP Processors Using Data Compression Techniques. In: Proceedings of the Conference on Advanced Research in VLSI, March, pp. 272–285 (1995)
Lyons, W.: Meeting the Embedded Design Needs of Automotive Applications. In: Proceedings of the conference on Design, Automation and Test in Europe, March, pp. 142–147 (2005)
MediaBench. http://cares.icsl.ucla.edu/mediabench (1997)
Nahshon, I., Bernstein, D.: FDPR - A Post-Pass Object Code Optimization Tool. In: Proceedings of the Poster Session of the International Conference on Compiler Construction, April, pp. 97–104 (1996)
Nelson, M,: DataCompression.info (2004), http://datacompression.info/
Shogan, S., Childers, B.R.: Compact Binaries with Code Compression in a Software Dynamic Translator. In: Proceedings of the conference on Design, Automation and Test in Europe, February, pp. 1052–1057 (2004)
SPEC CPU2000 (2000), http://www.spec.org/cpu2000/
Timmermans, M.: BICOM BIjective COMpressor (2000), http://www3.sympatico.ca/mt0000/bicom/
Williams, R.N.: An Extremely Fast Ziv-Lempel Data Compression Algorithm. In: Proceedings of the IEEE Data Compression Conference, April, pp. 362–371. IEEE Computer Society Press, Los Alamitos (1991)
Waldman, I., Pinter, S.: Profile-driven Compression Scheme for Embedded Systems. In: Proceedings of the Conference on Computing Frontiers, May, pp. 95–103 (2006)
Wolfe, A., Chanin, A.: Executing Compressed Programs on an Embedded RISC Architecture. In: Proceedings of the International Symposium on Microarchitecture, December, pp. 81–91 (1992)
Xie, Y., Wolf, W., Lekatsas, H.: Profile-Driven Selective Code Compression. In: Proceedings of the conf. on Design, Automation and Test in Europe, March, pp. 462–467 (2003)
Yoshida, Y., Song, B.-Y., Okuhata, H., Onoye, T., Shirakawa, I.: An Object Code Compression Approach to Embedded Processors. In: International Symposium on Low-Power Electronics and Design, August, pp. 265–268 (1997)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2007 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Pinter, S.S., Waldman, I. (2007). Selective Code Compression Scheme for Embedded Systems . In: Stenström, P. (eds) Transactions on High-Performance Embedded Architectures and Compilers I. Lecture Notes in Computer Science, vol 4050. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-71528-3_19
Download citation
DOI: https://doi.org/10.1007/978-3-540-71528-3_19
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-71527-6
Online ISBN: 978-3-540-71528-3
eBook Packages: Computer ScienceComputer Science (R0)