Abstract
On-chip communication architectures can have a great influence on the speed and area of System-on-Chip (SOC) designs. A new chip design paradigm called Network-on-Chip (NOC) offers a promising architectural choice for future SOC. Focusing on decreasing node degree, reducing links and shortening diameter, a new NOC, named Triple-based Hierarchical Interconnection Network (THIN), is presented in this paper. The topology of THIN is very simple and it has obviously hierarchical, symmetric and scalable characteristic. The network properties and zero-load latency were studied and compared with 2-D mesh and Hypercube. The results show THIN is superior to 2-D mesh and Hypercube to construct interconnection network for SOC, when the network size is not very large. A new tree-based multicast routing algorithm in THIN is proposed. Thorough analyses and experiments based on different multicast implementation schemes are conducted. The results do confirm the advantage of our scheme over unicast-based and path-based multicast schemes.
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Qiao, B., Shi, F., Ji, W. (2007). THIN: A New Hierarchical Interconnection Network-on-Chip for SOC. In: Jin, H., Rana, O.F., Pan, Y., Prasanna, V.K. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2007. Lecture Notes in Computer Science, vol 4494. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-72905-1_40
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DOI: https://doi.org/10.1007/978-3-540-72905-1_40
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