Abstract
A generic programmable time event coded circuit which forms the building block for a reconfigurable neuromorphic array is implemented in analog VLSI. An array of programmable time event coded circuit blocks is configured to implement functional circuit blocks of a spike time based neuromorphic model. A reconfigurable neuromorphic array chip with 10 event blocks is fabricated using Austria Microsystems 0.35 μm CMOS technology to demonstrate the functionality of the circuits in silicon.
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Koickal, T.J., Gouveia, L.C.P., Hamilton, A. (2007). A Programmable Time Event Coded Circuit Block for Reconfigurable Neuromorphic Computing. In: Sandoval, F., Prieto, A., Cabestany, J., Graña, M. (eds) Computational and Ambient Intelligence. IWANN 2007. Lecture Notes in Computer Science, vol 4507. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73007-1_53
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DOI: https://doi.org/10.1007/978-3-540-73007-1_53
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-73006-4
Online ISBN: 978-3-540-73007-1
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