Abstract
Since the introduction of pairings over (hyper)elliptic curves in constructive cryptographic applications, an ever increasing number of protocols based on pairings have appeared in the literature. Software implementations being rather slow, the study of hardware architectures became an active research area. Beuchat et al. proposed for instance a coprocessor which computes the characteristic three η T pairing, from which the Tate pairing can easily be derived, in 33 μs on a Cyclone II FPGA. However, a final exponentiation is required to ensure a unique output value and the authors proposed to supplement their η T pairing accelerator with a coprocessor for exponentiation. Thus, the challenge consists in designing the smallest possible piece of hardware able to perform this task in less than 33 μs on a Cyclone II device. In this paper, we propose a novel arithmetic operator implementing addition, cubing, and multiplication over \(\mathbb{F}_{3^{97}}\) and show that a coprocessor based on a single such operator meets this timing constraint.
This work was supported by the New Energy and Industrial Technology Development Organization (NEDO), Japan.
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Beuchat, JL., Brisebarre, N., Shirase, M., Takagi, T., Okamoto, E. (2007). A Coprocessor for the Final Exponentiation of the η T Pairing in Characteristic Three. In: Carlet, C., Sunar, B. (eds) Arithmetic of Finite Fields. WAIFI 2007. Lecture Notes in Computer Science, vol 4547. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73074-3_4
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