Abstract
In this paper, the design, simulation, implementation and experiment of rough set processor are described. The experiment result shows that the proposed processor is ten times faster than PC, though the clock frequency is about 70 times lower.
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References
Pawlak, Z.: Rough Sets – Theoritical Aspects of Reasoning about Data. Kluwer Academic Publishers, Dordrecht Boston London (1991)
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Kanasugi, A.: Design of Architecture for Rough Set Processor. In: Proc. Int. Workshop on Rough Set Theory and Granular Computing, pp. 201–204 (2001)
Kanasugi, A.: In: Inuguchi, M. et al. (eds.) Rough Set Theory and Granular Computing, pp. 273–280. Springer, Heidelberg (2002)
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Kanasugi, A., Matsumoto, M. (2007). Design and Implementation of Rough Rules Generation from Logical Rules on FPGA Board. In: Kryszkiewicz, M., Peters, J.F., Rybinski, H., Skowron, A. (eds) Rough Sets and Intelligent Systems Paradigms. RSEISP 2007. Lecture Notes in Computer Science(), vol 4585. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73451-2_62
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DOI: https://doi.org/10.1007/978-3-540-73451-2_62
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-73450-5
Online ISBN: 978-3-540-73451-2
eBook Packages: Computer ScienceComputer Science (R0)