Abstract
An issue that arises in evolvable hardware is how to verify the correctness of the evolved circuit, especially in online evolution. The traditional exhaustive evaluation approach has made evolvable hardware unpractical to real-world applications. In this paper an incremental evaluation approach for online evolution is proposed, in which the immune genetic algorithm is used as the search engine. This evolution approach is performed in an incremental way: some small seed-circuits have been evolved firstly; then these small seed-circuits are employed to evolve larger module-circuits; and the module-circuits are utilized to build still larger circuits further. The circuits of 8-bit adder, 8-bit multiplier and 110-sequence detector have been evolved successfully. The evolution speed of the incremental evaluation approach appears to be more effective compared with that of the exhaustive evaluation method; furthermore, the incremental evaluation approach can be used both in the combinational logic circuits as well as the sequential logic circuits.
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Yao, R., Wang, Yr., Yu, Sl., Gao, Gj. (2007). Research on the Online Evaluation Approach for the Digital Evolvable Hardware. In: Kang, L., Liu, Y., Zeng, S. (eds) Evolvable Systems: From Biology to Hardware. ICES 2007. Lecture Notes in Computer Science, vol 4684. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74626-3_6
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DOI: https://doi.org/10.1007/978-3-540-74626-3_6
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