Abstract
We propose a high-speed passphrase-search system for PGP using FPGA for the purpose of evaluating PGP’s passphrase-based security. In order to implement a high-speed search circuit on a single FPGA, we manage to surmount three major hurdles in PGP. The first one, multiprecision arithmetics which arises a problem of speed, is cleared by reducing the number of arithmetics needed. The second one, heavy iteration of hashing which also lowers the search speed, is settled by pipelining the hash function. The last one, candidate passphrase generation which cannot be implemented on hardware, is treated by combining a PC with the FPGA. We thereby achieve a throughput of 56 Gbps per FPGA that amounts to 1.1 ×105 passphrases per second. Compared with a fully software-based search, it shows 38 times faster the speed. We also propose to use an embedded FPGA system and to have part of software such as passphrase generation, to be run on a CPU inside the FPGA. We expect the search system to be more self-contained in an FPGA and thus to have a lower risk of data bus bottleneck between PCs and FPGAs especially in a massive parallel system where many FPGAs are connected to one PC.
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Shimizu, K., Suzuki, D., Tsurumaru, T. (2008). High-Speed Search System for PGP Passphrases. In: Franklin, M.K., Hui, L.C.K., Wong, D.S. (eds) Cryptology and Network Security. CANS 2008. Lecture Notes in Computer Science, vol 5339. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-89641-8_24
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DOI: https://doi.org/10.1007/978-3-540-89641-8_24
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