Abstract
This paper presents a novel hardware architecture for genetic vector quantizer (VQ) design. The architecture is based on steady-state genetic algorithm (GA). It adopts a novel architecture based on shift registers for accelerating mutation and crossover operations while reducing area cost. It also uses a pipeline architecture for fitness evaluation. The proposed architecture has been embedded in a softcore CPU for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for VQ optimization attaining both high performance and low computational time.
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References
Choi, Y.H., Chung, D.J.: VLSI Processor of Parallel Genetic Algorithm. In: IEEE Asia Pacific Conf. on ASICs, pp. 143–146 (2000)
Eiben, A.E., Smith, J.D.: Introduction to Evolutionary Computing. Springer, Heidelberg (2003)
Gersho, A., Gray, R.M.: Vector Quantization and Signal Compression. Kluwer, Norwood (1992)
Hwang, W.J., Hong, S.L.: Genetic entropy-constrained vector quantization. Optical Engineering 38, 233–239 (1999)
Hwang, W.J., Li, H.Y., Yeh, Y.J., Chan, K.F.: FPGA Implementation of Competitive Learning with Partial Distance Search in the Wavelet Domain. In: Kang, G.B. (ed.) Progress in Neurocomputing Research, ch. 8, pp. 203–221. NOVA Science Publisher (2008)
Hauck, S., Dehon, A.: Reconfigurable Computing. Morgan Kaufmann, San Francisco (2008)
Mitchell, M.: An introduction to genetic algorithm. MIT Press, Cambridge (1996)
Nedjah, N., Mourelle, L.: Hardware Architecture for Genetic Algorithms. In: Ali, M., Esposito, F. (eds.) IEA/AIE 2005. LNCS, vol. 3533, pp. 554–556. Springer, Heidelberg (2005)
Rasheed, K., Davisson, B.D.: Effect of global parallelism on the behave of a steady state genetic algorithm for design optimization. In: Proceedings of the Congress on Evolutionary Computation, Washington, DC (1999)
Tommiska, M., Vuori, J.: Implementation of genetic algorithms with programmable logic devices. In: Proc. 2nd Nordic Workshop on Genetic Algorithms and Their Applications, pp. 111–126 (1996)
Stratix II Device Handbook, Altera Corporation (2008), http://www.altera.com/literature/lit-nio2.jsp
NIOS II Processor Reference Handbook, Altera Corporation (2008), http://www.altera.com/literature/lit-nio2.jsp
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Lin, TK., Li, HY., Hwang, WJ., Ou, CM., Weng, SK. (2008). Genetic Vector Quantizer Design on Reconfigurable Hardware. In: Li, X., et al. Simulated Evolution and Learning. SEAL 2008. Lecture Notes in Computer Science, vol 5361. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-89694-4_48
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DOI: https://doi.org/10.1007/978-3-540-89694-4_48
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-89693-7
Online ISBN: 978-3-540-89694-4
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