Abstract
Reversible logic is emerging as a promising computing paradigm, having its applications in low-power CMOS, quantum computing, nanotech-nology and optical computing. Firstly, we showed a modified design of conventional BCD subtractors and also proposed designs of carry look-ahead and carry skip BCD subtractors. The proposed designs of carry look-ahead and carry skip BCD subtractors are based on the novel designs of carry look-ahead and carry skip BCD adders, respectively. Then, we introduced the reversible logic implementation of the modified conventional, as well as the proposed, carry look-ahead and carry skip BCD subtractors efficient in terms of the number of reversible gates used and garbage output produced. To the best of our knowledge, the carry look-ahead and carry skip BCD subtractors and their reversible logic design are explored for the first time ever in literature.
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Thapliyal, H., Arabnia, H.R., Srinivas, M.B. (2009). Efficient Reversible Logic Design of BCD Subtractors. In: Gavrilova, M.L., Tan, C.J.K. (eds) Transactions on Computational Science III. Lecture Notes in Computer Science, vol 5300. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00212-0_6
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DOI: https://doi.org/10.1007/978-3-642-00212-0_6
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