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Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5453))

Abstract

In this paper we develop compilation techniques for the realization of applications described in a High Level Language (HLL) onto a Runtime Reconfigurable Architecture. The compiler determines Hyper Operations (HyperOps) that are subgraphs of a data flow graph (of an application) and comprise elementary operations that have strong producer-consumer relationship. These HyperOps are hosted on computation structures that are provisioned on demand at runtime. We also report compiler optimizations that collectively reduce the overheads of data-driven computations in runtime reconfigurable architectures. On an average, HyperOps offer a 44% reduction in total execution time and a 18% reduction in management overheads as compared to using basic blocks as coarse grained operations. We show that HyperOps formed using our compiler are suitable to support data flow software pipelining.

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Alle, M., Varadarajan, K., Fell, A., Nandy, S.K., Narayan, R. (2009). Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures. In: Becker, J., Woods, R., Athanas, P., Morgan, F. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2009. Lecture Notes in Computer Science, vol 5453. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00641-8_21

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  • DOI: https://doi.org/10.1007/978-3-642-00641-8_21

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-00640-1

  • Online ISBN: 978-3-642-00641-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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