Abstract
In this paper we present regular expression pattern matching architecture supporting constrained repetitions. The proposed architecture can implement the constrained repetitions of a regular expression while previous works support only the constrained repetitions of a single character or a multi-cycle, fixed length pattern. The blocks for the constrained repetitions are simply implemented using a counter. The beginning constrained repetition blocks are implemented differently from the non-beginning blocks to support overlapped matching. The proposed architecture can implement all constrained repetitions used in Snort rule-sets with smaller resources.
This work was supported by the Korea Research Foundation Grant funded by the Korean Government (KRF-2008-521-D00446).
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References
Sidhu, R., Prasanna, V.K.: Fast regular expression matching using FPGAs. In: IEEE Symp. Field Prog. Custom Comput. Machines (FCCM 2001), pp. 227–238 (2001)
PCRE: Perl compatible regular expressions, http://www.pcre.org
Hutchings, B.L., Franklin, R., Carver, D.: Assisting network intrusion detection with reconfigurable hardware. In: IEEE Symp. Field Prog. Custom Comput. Machines (FCCM 2002), pp. 111–120 (2002)
Sutton, P.: Partial character decoding for improved regular expression matching in fpgas. In: Int. Conf. Field-Programmable Logic and App (FPL 2006), pp. 25–32 (2004)
Lin, C.H., Huang, C.T., Jiang, C.P., Chang, S.C.: Optimization of regular expression pattern matching circuits on FPGA. In: Conf. Design, Automation and Test in Europe (DATE 2006), pp. 12–17 (2006)
Bispo, J.C., Sourdis, I., Cardoso, J.M., Vassiliadis, S.: Regular expression matching for reconfigurable packet inspection. In: IEEE Int. Conf. Field Programmable Technology (FPT 2006), pp. 119–126 (2006)
Sourdis, I., Vassiliadis, S., Bispo, J.C., Cardoso, J.M.: Regular expression matching in reconfigurable hardware. J. Signal Processing Systems 51(1), 99–121 (2008)
Bispo, J., Sourdis, I., Cardoso, J.M.P., Vassiliadis, S.: Synthesis of regular expressions targeting FPGAs: Current status and open issues. In: Diniz, P.C., Marques, E., Bertels, K., Fernandes, M.M., Cardoso, J.M.P. (eds.) ARCS 2007. LNCS, vol. 4419, pp. 179–190. Springer, Heidelberg (2007)
Bispo, J., Cardoso, J.M.: Synthesis of regular expressions for FPGAs. Int. J Electronics 95(7), 685–704 (2008)
Sourcefire: SNORT official web site, http://www.snort.org
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Yun, S., Lee, K. (2009). Regular Expression Pattern Matching Supporting Constrained Repetitions. In: Becker, J., Woods, R., Athanas, P., Morgan, F. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2009. Lecture Notes in Computer Science, vol 5453. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00641-8_32
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DOI: https://doi.org/10.1007/978-3-642-00641-8_32
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-00640-1
Online ISBN: 978-3-642-00641-8
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