Abstract
Voltage dithering is a voltage scaling technique for reducing the dynamic energy consumption. This technique enables to switch between two power supplies dynamically. However, switching consumes a considerable amount of additional energy. In this paper, we propose a new charge recycling circuit to reduce the energy overhead of voltage switching. The innovation of this circuit is that some charge is recycled by redirecting this charge from one power supply line to another before the voltage is switched. This charge transfer decreases the current driven from the power supply during voltage switching, thereby reducing the energy overhead. Applying the charge recycling technique to two carry-ripple adders reduces the dynamic energy overhead of voltage switching by 43.2%.
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References
Calhoun, B., Chandrakasan, A.: Ultra-dynamic voltage scaling (UDVS) using sub-threshold operation and local voltage dithering. IEEE Journal of Solid State Circuits 41(1), 238–245 (2006)
Cheng, W.H., Baas, B.M.: Dynamic voltage and frequency scaling circuits with two supply voltages. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1236–1239. IEEE, Los Alamitos (2008)
Hahm, M.: Modest power savings for applications dominated by switching of large capacitive loads. In: International Symposium on Low Power Electronics and Design (ISLPED), pp. 60–61. IEEE, Los Alamitos (1995)
Kursun, V., Friedman, E.: Multi-voltage CMOS Circuit Design. John Wiley and Sons, New York (2006)
Lyuboslavsky, V., Bishop, B., Narayanan, V., Irwin, M.: Design of databus charge recovery mechanism. In: ASIC/SOC Conference, pp. 283–287. IEEE, Los Alamitos (2000)
Pakbaznia, E., Fallah, F., Pedram, M.: Charge recycling in MTCMOS circuits: concept and analysis. In: Proceedings of the 43rd Design Automation Conference (DAC), pp. 97–102. ACM, New York (2006)
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Schweizer, T., Oliveira, J., Kuhn, T., Rosenstiel, W. (2010). Low Energy Voltage Dithering in Dual V DD Circuits. In: Monteiro, J., van Leuken, R. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2009. Lecture Notes in Computer Science, vol 5953. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-11802-9_28
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DOI: https://doi.org/10.1007/978-3-642-11802-9_28
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-11801-2
Online ISBN: 978-3-642-11802-9
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