Abstract
In this paper the performance of a closed formula implemented in reconfigurable hardware for the Tate pairing Algorithm over the binary field of GF(2m) is studied. Using the algorithm improvement of Soonhak Kwon [2], the schedule for performing the Tate pairing without a square root operation is explored along with the area and time consumption trade-offs involved in the hardware implementation of the target algorithm.
This material is based upon works supported by the Science Foundation Ireland under Grant No. [SFI/ 08/RFP/ENE1643].
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Pan, W., Marnane, W. (2010). A Reconfigurable Implementation of the Tate Pairing Computation over GF(2m). In: Sirisuk, P., Morgan, F., El-Ghazawi, T., Amano, H. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2010. Lecture Notes in Computer Science, vol 5992. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12133-3_10
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DOI: https://doi.org/10.1007/978-3-642-12133-3_10
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