Abstract
Increasing computational requirements are the cause of the use of multicore multithread processors in embedded real-time systems. Although these processors are more efficient they are also more complex and power hungry. Consequently energy consumption has become a major concern in these systems. In this context, new designs are being researched to deal with these limitations. On the other hand, simulators play an important role in research since they can reliably evaluate different research proposals. In this paper we propose some extensions for Multi2Sim, a multicore multithread processors simulator, in order to support hard real-time systems with dynamic voltage scaling capability. In addition, the main guidelines to model power-aware hard real-time systems are discussed, which will be useful to extend other processor simulators with similar purposes. Finally, different partitioning algorithms are also compared by using simulation experiments to show how they affect the system performance.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Ubal, R., Sahuquillo, J., Petit, S., López, P.: Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors. In: 19th International Symposium on Computer Architecture and High Performance Computing (2007)
Hung, C.M., Chen, J.J., Kuo, T.W.: Energy-Efficient Real-Time Task Scheduling for a DVS System with a non-DVS processing Element. In: 27th IEEE International Real-Time Systems Symposium, pp. 303–312 (2006)
The Multi2Sim Simulation Framework Website, http://www.multi2sim.org
Burguer, D.C., Austin, T.M.: The SimpleScalar Tool Set, Version 2.0. Technical Report CS-TR- 1997-1342 (1997)
Madon, D., Sanchez, E., Monnier, S.: A Study of a Simultaneous Multithreaded Processor Implementation. In: European Conference on Parallel Processing (1999)
Sharkley, J.: M-Sim: A Flexible, Multithreaded Architectural Simulation Environment. Technical Report CS-TR-05-DP01, Department of Computer Science, State University of New York at Binghamton (2005)
Tullsen, D.M.: Simulation and Modelling of a Simultaneous Multithreading Processor. In: 22nd Annual Computer Measurement Group Conference (December 1996)
Zhang, Y., Parikh, D., Sankaranarayanan, K., Skadron, K., Stan, M.: HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects. Univ. of Virginia, Dept. of Computer Science, Technical Report CS-2003-05
Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J., Larsson, F., Moestedt, A., Werner, B.: Simics: A Full System Simulation Platform. IEEE Computer 35(2) (2002)
Marty, M.R., Beckmann, B., Yen, L., Alameldeen, A.R., Xu, M., Moore, K.: GEMS: Multifacet’s General Execution-driven Multiprocessor Simulator. In: International Symposium on Computer Architecture (2006)
Zhu, Y., Mueller, F.: Feedback EDF Scheduling of Real-Time tasks exploiting dynamic voltage scaling. Real-Time Systems Journal (December 2005)
Sharma, V., Thomas, A., Abdelzaher, T.F., Skadron, K., Lu, Z.: Power-aware QoS Management in Web Servers. In: 24th IEEE Real-Time Systems Symposium, Cancun, Mexico, pp. 52–63 (2003)
Cazorla, F.J., Knijnenburg, P.M., Sakellariou, R., Fernández, E., Ramirez, A., Valero, M.: Predictable performance in SMT processors: Synergy between the OS and SMTs. IEEE Transactions on Computers 55(7) (2006)
Aydin, H., Yang, Q.: Energy-Aware Partitioning for multiprocessor Real-Time Systems. In: 17th International Parallel and Distributed Processing Symposium, Workshop on Parallel and Distributed Real-Time Systems (2003)
AlEnawy, T., Aydin, H.: Energy-Aware Task Allocation for Rate Monotonic Scheduling. In: 11th IEEE RTAS, Washington, DC, USA, pp. 213–223 (2005)
Wu, Q., Reddi, V.J., Wu, Y., Lee, J., Connors, D., Brooks, D., Martonosi, M., Clark, D.W.: A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. In: MICRO-38 (2005)
Mälardalen Real-Time Research Centre (MRTC). WCET analysis project (2009), http://www.mrtc.mdh.se/projects/wcet/benchmarks.html
Watanabe, R., Kondo, M., Imai, M., Nakamura, H., Nanya, T.: Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC. In: Design Automation and Test in Europe (2007)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
March, J.L., Sahuquillo, J., Hassan, H., Petit, S., Duato, J. (2010). Extending a Multicore Multithread Simulator to Model Power-Aware Hard Real-Time Systems. In: Hsu, CH., Yang, L.T., Park, J.H., Yeo, SS. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2010. Lecture Notes in Computer Science, vol 6082. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-13136-3_45
Download citation
DOI: https://doi.org/10.1007/978-3-642-13136-3_45
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-13135-6
Online ISBN: 978-3-642-13136-3
eBook Packages: Computer ScienceComputer Science (R0)