Abstract
Secure Hashing Algorithm (SHA) is increasingly becoming popular for the online security applications, specifically, for mobile and embedded system platforms. Hash functions have many information security applications, notably in digital signatures, message authentication codes (MACs), and other forms of authentication. This necessitates a high performance hardware implementation of the SHA algorithms (SHA–512). In this paper we propose a new method for generating digital signature based on SHA-512 hash algorithm. This design uses two SHA-512 modules in parallel which operate simultaneously to provide highly secure, more efficient and high throughput mechanism to compute a 1024- bit Message Digest (MD) or Hash.
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References
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Kayalvizhi, R., Harihara Subramanian, R., Girish Santhosh, R., Gurubaran, J., Vaidehi, V. (2010). VLSI Design and Implementation of Combined Secure Hash Algorithm SHA-512. In: Meghanathan, N., Boumerdassi, S., Chaki, N., Nagamalai, D. (eds) Recent Trends in Network Security and Applications. CNSA 2010. Communications in Computer and Information Science, vol 89. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-14478-3_11
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DOI: https://doi.org/10.1007/978-3-642-14478-3_11
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-14477-6
Online ISBN: 978-3-642-14478-3
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