Abstract
Dynamic fault-tolerant techniques such as Built-in Self Repair (BISR) are becoming increasingly important as new challenges emerge in deep-submicron era. A dynamic fault-tolerant system was implemented on the Ubichip platform developed in the PERPLEXUS European project, which is a bio-inspired custom reconfigurable VLSI. The system is power-aware; power consumption is monitored dynamically to regulate the number of copies made by a self-replication mechanism. This paper reports the design, implementation, and simulation of the fault-tolerant system.
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Kobayashi, K., Moreno, J.M., Madrenas, J. (2010). Implementation of a Power-Aware Dynamic Fault Tolerant Mechanism on the Ubichip Platform. In: Tempesti, G., Tyrrell, A.M., Miller, J.F. (eds) Evolvable Systems: From Biology to Hardware. ICES 2010. Lecture Notes in Computer Science, vol 6274. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15323-5_26
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DOI: https://doi.org/10.1007/978-3-642-15323-5_26
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