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4T Carry Look Ahead Adder Design Using MIFG

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Part of the book series: Communications in Computer and Information Science ((CCIS,volume 101))

Abstract

Low-voltage and low-power circuit structures are substantive for almost all mobile electronic gadgets which generally have mixed mode circuit structures embedded with analog sub-sections. Using the reconfigurable logic of multi-input floating gate MOSFETs, 4-bit full adder has been designed for 1.8V operation. Multi-input floating gate (MIFG) transistors have been anticipating in realizing the increased functionality on a chip. A multi-input floating gate MOS transistor accepts multiple inputs signals, calculates the weighted sum of all input signals and then controls the ON and OFF states of the transistor. This enhances the transistor function to more than just switching. Implementing a design using multi-input floating gate MOSFETs brings down transistor count and number of interconnections. Here in this we have presented how to eliminate the propagate and generate signals This tends the design to become more efficient in area and power consumption. The following information is about Carry look ahead adder circuit, tested with 45nm technology and is extended to ALU. The proposed circuit has been implemented in 45n-well CMOS technology.

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© 2010 Springer-Verlag Berlin Heidelberg

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Murthy, P.H.S., Madan Mohan, L., Sreenivasa Rao, V., Malleswara Rao, V. (2010). 4T Carry Look Ahead Adder Design Using MIFG. In: Das, V.V., Vijaykumar, R. (eds) Information and Communication Technologies. ICT 2010. Communications in Computer and Information Science, vol 101. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15766-0_80

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  • DOI: https://doi.org/10.1007/978-3-642-15766-0_80

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-15765-3

  • Online ISBN: 978-3-642-15766-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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