Abstract
The placement and routing is a hot topic in Evolvable Hardware, the work of the placement and routing in this paper is as follows: (1) Combining with FPGA’s and the VPR’s “placement and routing” two-stage optimization model, the designed “random placement and optimal routing” model meets the tasks of placement and routing in PEA that is N*N array of PE. (2)The designed pathfinder based on simulated annealing is a solution for the “placement and optimal routing” cycle model, it uses obstacle avoidance to solve the placement and routing problem. (3)By numerical test experiments, we verify that the success rate of pathfinder based on simulated annealing is higher than the commonly used “depth-first search” under the PEA framework.
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Yu, Z., Zeng, S., Guo, Y., Hu, N., Song, L. (2010). Pathfinder Based on Simulated Annealing for Solving Placement and Routing Problem. In: Cai, Z., Hu, C., Kang, Z., Liu, Y. (eds) Advances in Computation and Intelligence. ISICA 2010. Lecture Notes in Computer Science, vol 6382. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-16493-4_40
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DOI: https://doi.org/10.1007/978-3-642-16493-4_40
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-16492-7
Online ISBN: 978-3-642-16493-4
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