Abstract
This paper proposes a program of efficient dual-port SRAM data exchange without waiting with FIFO-based cache, which is targeted for timely, massive and interactive features of data transmission in MIMO systems, using FIFO as a dual-port SRAM external cache to achieve real-time data exchange between multiple systems or processors. The program can solve time conflict and data covering problem in the competitive state of data storage, reduce the transmission delay to wait for data exchange. This paper uses dual-port SRAM CY7C019 to do a simulation test for the program, which can realize effective addressing between memory and CPU in address mapping way. By the analyses to the system performance, the effectiveness and feasibility of this program is proved.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Li, J., Conan, J., Pierre, S.: Mobile Station Location Estimation for MIMO Communication Systems. In: 3rd International Symposium on Wireless Communication Systems 2006, ISWCS 2006, pp. 561–563 (2006)
Liu, L., Nagaraj, P., Upadhyaya, S., Sridhar, R.: Defect Analysis and Defect Tolerant Design of Multi-port SRAMs. Journal of Electronic Testing: Theory and Applications (JETTA) 24(1-3), 165–179 (2008)
Noguchi, H., Okumura, S., Iguchi, Y., Fujiwara, H., Morita, Y., Nii, K., Kawaguchi, H., Yoshimoto, M.: Which is the Best Dual-port SRAM in 45-nm Process Technology? -8T, 10T Single End, and 10T Differential. In: Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT, pp. 55–58 (2008)
Yang, H.-I., Chang, M.-H., Lin, T.-J., Ou, S.-H., Deng, S.-S., Liu, C.-W., Hwang, W.: A Controllable Low-Power Dual-Port Embedded SRAM for DSP Processor. In: Records of the IEEE International Workshop on Memory Technology, Design and Testing, pp. 27–30 (2007)
Li, F.: Fairness Analysis in Competitive FIFO Buffer Management. In: Conference Proceedings of the IEEE International Performance, Computing, and Communications Conference, pp. 239–246 (2008)
Jiannong, C., Xinyu, F., Lu, J., SajalK, D.: Mailbox-based scheme for mobile agent communications. Computer 35(9), 54–60 (2002)
Xiaofei, X., Yi, L., JiChang, K.: The Research on Zero-Copy Receiving Method Based on Communication-Page Pool. In: Proceedings Parallel and Distributed Computing, Applications and Technologies, PDCAT, pp. 416–419 (2003)
Jing, W., Xiaoya, F., Hai, W., Ming, Y.: A 16-Port Data Cache for Chip Multi-Processor Architecture. In: 2007 8th International Conference on Electronic Measurement and Instruments, ICEMI, pp. 3183–3186 (2007)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Qianqian, A.J., Ping, Z., Sen, C., Jingjing, T., Xu, W., Yong, W. (2010). The Research of Efficient Dual-Port SRAM Data Exchange without Waiting with FIFO-Based Cache. In: Wang, F.L., Gong, Z., Luo, X., Lei, J. (eds) Web Information Systems and Mining. WISM 2010. Lecture Notes in Computer Science, vol 6318. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-16515-3_39
Download citation
DOI: https://doi.org/10.1007/978-3-642-16515-3_39
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-16514-6
Online ISBN: 978-3-642-16515-3
eBook Packages: Computer ScienceComputer Science (R0)