Abstract
In this paper, we propose a dynamically reconfigurable platform for self-organizing neural network hardware. In the proposed platform, a hardware unit can be handled as a hardware object in object-oriented design. The hardware object is loaded into the FPGA’s virtual hardware circuit space, and accelerates the calculation of self-organizing neural networks. We design two types of the distance calculation, a winner-take-all and a rough-winner-take-all virtual hardware circuit as common parts of self-organizing neural networks. By combining them, we realize four types of self-organizing neural network. Experimental results show that the implemented self-organizing neural network hardware achieves about 100 times faster than the software implementation. Besides, the proposed platform can change its learning mode easily as well as the software implementation. Therefore, the proposed platform features both of the speed of hardware and the flexibility of software.
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Tamukoh, H., Sekine, M. (2010). A Dynamically Reconfigurable Platform for Self-Organizing Neural Network Hardware. In: Wong, K.W., Mendis, B.S.U., Bouzerdoum, A. (eds) Neural Information Processing. Models and Applications. ICONIP 2010. Lecture Notes in Computer Science, vol 6444. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-17534-3_54
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DOI: https://doi.org/10.1007/978-3-642-17534-3_54
Publisher Name: Springer, Berlin, Heidelberg
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