Abstract
Ethernet is becoming the dominant data transmission technology for service providers due to its simplicity and low cost. However, the need for Quality of Service (QoS) provisioning for some time-sensitive applications drives the definition of new functionalities in Ethernet. In this work we address QoS in Ethernet by introducing a time synchronization capability at MAC level while maintaining its asynchronous and distributed architecture. We present a reconfigurable logic platform based on a Field Programmable Gate Array (FPGA) in which we embed our custom timestamping unit (TSU). Leveraging the TSU, we have implemented a synchronization mechanism with which we achieved a best-case synchronization accuracy of zero nanoseconds. The effectiveness of the method is confirmed through several experiments.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Steinmetz, R.: Human Perception of Jitter and Media Synchronization. IEEE Journal on Selected Areas in Communications 14(1), 61–72 (1996)
Arlos, P.: On the Quality of Computer Network Measurements, Ph.D. Thesis, Blekinge Institute of Technology (2005)
IEEE Standard for Local and Metropolitan Area Carrier Sense Multiple Access with Collision Detection Access Method and Physical Layer Specifications, IEEE Std 802.3-2005 (2005)
Kopetz, H., Ochsenreiter, W.: Clock Synchronization in Distributed Real-Time Systems. IEEE Transactions of Computers C-36(8), 933–939 (1987)
Nicolau, C., Sala, D., Canto, E.: Clock Duplicity for High-Precision Timestamping in Gigabit Ethernet. In: 19th Int. Conf. on Field Programmable Logic and Applications (FPL), Czech Republic, August 31–September 2 (2009)
IEEE 1588 Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEC 61588:2009(E), pp. C1–274 (2009)
Mills, D.L.: Network Time Protocol (Version 3) Specification, Implementation and Analysis, RFC-1305 (March 1992)
Kutschera, C., et al.: Background IEEE 1588 Clock Synchronization over IEEE 802.3/Ethernet. In: IEEE Symp. on Precision Clock Synchronization (ISPCS 2008), September 22-26 , pp. 137–141 (2008)
Finn, N., Cisco Systems Inc.: Sync PDUs and the MAC Stack - Help needed from 802.3 to properly process IEEE 1588/P802.1AS sync PDUs. In: IEEE 802.3/IEEE 802.1 joint session, Denver, CO, USA (July 2008)
Xilinx, Inc.: ML40x Evaluation Platform User Guide, ug080 v2.5 (2006)
Stephenson, J., Altera Corp.: Don’t Let Metastability Cause Problems in Your FPGA-Based Design (2009), http://www.pldesignline.com/220300400
Weinstein, R.: The “Flancter” (App. Note), Memec Design App Note.pdf (2000), http://www.floobydust.com/flancter/Flancter
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2011 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering
About this paper
Cite this paper
Nicolau, C. (2011). A Zero-Nanosecond Time Synchronization Platform for Gigabit Ethernet Links. In: Magedanz, T., Gavras, A., Thanh, N.H., Chase, J.S. (eds) Testbeds and Research Infrastructures. Development of Networks and Communities. TridentCom 2010. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 46. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-17851-1_23
Download citation
DOI: https://doi.org/10.1007/978-3-642-17851-1_23
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-17850-4
Online ISBN: 978-3-642-17851-1
eBook Packages: Computer ScienceComputer Science (R0)