Abstract
It is our pleasure to welcome you to this special section of Transactions on High-Performance Embedded Architectures and Compilers (HiPEAC), presenting selected papers from the 2007 edition of Medea Workshop. This workshop, held in conjunction with the PACT conference since 2000, has moved its topics of interest from decoupled architectures to memory hierarchy arguments, with emphasis on embedded and application-specific CMP systems.
Keywords
- Memory Hierarchy
- Parallelization Scheme
- Harris Corner Detector
- Heterogeneous Architecture
- Reorder Buffer
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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© 2011 Springer-Verlag Berlin Heidelberg
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Bartolini, S., Foglia, P., Prete, C.A. (2011). Eighth MEDEA Workshop. In: Stenström, P. (eds) Transactions on High-Performance Embedded Architectures and Compilers III. Lecture Notes in Computer Science, vol 6590. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19448-1_5
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DOI: https://doi.org/10.1007/978-3-642-19448-1_5
Publisher Name: Springer, Berlin, Heidelberg
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