Abstract
Transactional Memory (TM) is one kind of approach to maximize parallel performance for multicore systems. There are conflicts When two or more parallel transactions access the same location and at least one access is a write. Contention management(CM) refers to the mechanisms used to guarantee forward—to avoid performance pathology, and to promote throughput. In this paper, we introduce a new CM police. We remitted six of seven performance pathologies summered by Bobba. Our result shows high performance for large transactions, while get moderate improvement or little slowdown for small transactions. The performance of the systems used this policies combined with other policy are steady.
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Wang, X., ji, Z., Fu, C., hu, M. (2011). A Comprehensive Scheme for Contention Management in Hardware Transactional Memory. In: Qi, L. (eds) Information and Automation. ISIA 2010. Communications in Computer and Information Science, vol 86. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19853-3_58
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DOI: https://doi.org/10.1007/978-3-642-19853-3_58
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