Abstract
The systolic array implementation of artificial neural networks is one of the ideal solutions to communication problems generated by highly interconnected neurons. A systolic array is an arrangement of processors in an array where data flows synchronously across the array between neighbours, usually with different data flowing in different directions. The simulation of systolic array for matrix multiplication is the practical application in order to evaluate the performance of systolic array. In this paper, a two-dimensional orthogonal systolic array for matrix multiplication is presented. Perl scripting language is used to simulate a two-dimensional orthogonal systolic array compared to conventional matrix multiplication in terms of average execution time. The comparison is made using matrices of size 5xM versus Mx5 which M ranges from 1 to 10, 10 to 100 and 100 to 1000. The orthogonal systolic array results show better average execution time when M is more than 30 compared to conventional matrix multiplication when the size of the matrix multiplication is increased.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Sudha, N., Mohan, A.R., Meher, P.K.: Systolic array realization of a neural network-based face recognition system. In: IEEE International Conference on Industrial Electronics and Applications (ICIEA 2008), pp. 1864–1869 (2008)
Kung, S.Y., Hwang, J.N.: A unified systolic architecture for artificial neural networks. J. Parallel Distrib. Comput. 6, 358–387 (1989)
Hwang, J.N., Vlontzos, J.A., Kung, S.Y.: A systolic neural network architecture for hidden markov models. IEEE Trans. on ASSP 32(12), 1967–1979 (1989)
Shapri, A.H.M., Rahman, N.A.: Performance evaluation of systolic array matrix multiplication using scripting language. In: Proc. Regional Conference of Solid State Science and Technology, RCSSST (2009)
Knuth, D.: The Art of Computer Programming. Seminumerical Algorithms, vol. 2, pp. 398–422. Addison Wesley, Reading (1969)
Lamagna, E.A.: Fast Computer Algebra, vol. 43. IEEE Computer Society Press, Los Alamitos (1982)
Spainhour, S., Siever, E., Patwardhan, N.: Perl in a Nutshell, 2nd edn., pp. 43–45. O’Reilly Media, Sebastopol (2002)
Friedl, J.E.F.: Mastering Regular Expressions. O’Reilly & Associates, Inc., Sebastopol (1998)
Muroga, C.: On a Case of Symbiosis between Systolic Arrays. Integration the VLSI Jurnal 2, 243–253 (1984)
Amin, S.A., Evans, D.J.: Systolic array design for low-level image processing. Kybernetes 23 (1994)
Chung, J.H., Yoon, H.S., Maeng, S.R.: A Systolic Array Exploiting the Inherent Parallelisms of Artificial Neural Networks. Micro-processing and Microprogramming, vol. 33. Elsevier Science Publishers B. V, Amsterdam (1992)
Kane, A.J., Evans, D.J.: An instruction systolic array architecture for neural networks. International Journal of Computer Mathematics 61 (1996)
Mahapatraa, S., Mahapatra, R.N.: Mapping of neural network models onto systolic arrays. Journal of Parallel and Distributed Computing 60, 677–689 (2000)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2011 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Mohd Shapri, A.H., Rahman, N.A., Abd. Wahid, M.H. (2011). Performance Study of Two-Dimensional Orthogonal Systolic Array. In: Zain, J.M., Wan Mohd, W.M.b., El-Qawasmeh, E. (eds) Software Engineering and Computer Systems. ICSECS 2011. Communications in Computer and Information Science, vol 180. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-22191-0_49
Download citation
DOI: https://doi.org/10.1007/978-3-642-22191-0_49
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-22190-3
Online ISBN: 978-3-642-22191-0
eBook Packages: Computer ScienceComputer Science (R0)