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International Symposium on Automated Technology for Verification and Analysis

ATVA 2011: Automated Technology for Verification and Analysis pp 120–134Cite as

Model Checking EGF on Basic Parallel Processes

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Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 6996))

Abstract

In this paper we study the problem of model checking the logic EGF over Basic Parallel Processes (BPP). The logic EGF is obtained by extending the logic EF with the CTL* notation EGF, which means that there exists an infinite path on which there are infinitely many entries satisfying certain property. We prove that this problem is PSPACE-complete, and \(\Sigma_d^p\)-complete for certain classes of fixed formula with the nesting depth d of modal operators.

Supported by a CSC scholarship.

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Author information

Authors and Affiliations

  1. RWTH Aachen University, Ahornstraße 55, D-52074, Aachen, Germany

    Hongfei Fu

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  1. Hongfei Fu
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Editors and Affiliations

  1. University of California, Santa Barbara, CA, USA

    Tevfik Bultan

  2. Department of Computer Science and Information Engineering, National Chung Cheng University, 168 University Road, Min-Hsiung, 62102, Chiayi, Taiwan, ROC

    Pao-Ann Hsiung

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© 2011 Springer-Verlag Berlin Heidelberg

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Fu, H. (2011). Model Checking EGF on Basic Parallel Processes. In: Bultan, T., Hsiung, PA. (eds) Automated Technology for Verification and Analysis. ATVA 2011. Lecture Notes in Computer Science, vol 6996. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-24372-1_10

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  • DOI: https://doi.org/10.1007/978-3-642-24372-1_10

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-24371-4

  • Online ISBN: 978-3-642-24372-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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