Skip to main content

Fixed-Width Modified Booth Multiplier Design Based on Error Bound Analysis

  • Conference paper
Book cover Multimedia, Computer Graphics and Broadcasting (MulGraB 2011)

Abstract

The maximum quantization error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, the error bound offered-width modified Booth multiplier is analyzed. Then, we present a design method that can be used to reduce the maximum error. By simulations, it is shown that the performance of the proposed fixed-width multiplier is close to that of the multiplier with rounding scheme. Also, by an FIR filter example, it is shown that the proposed method can be successfully applied to many multimedia and DSP applications requiring fixed-width property.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Schulte, M.J., Swartzlander Jr., E.E.: Proceedings of the VLSI Signal Processing (1993)

    Google Scholar 

  2. King, E.J., Swartzlander Jr., E.E.: Proceedings of the 31st Asilomar Conference on Signals, Systems, Computers (1997)

    Google Scholar 

  3. Jou, J.M., Kung, S.R., Chen, R.D.: IEEE Trans. Circuits & Systems II (1999)

    Google Scholar 

  4. Van, L.D., Wang, S.S., Feng, W.S.: IEEE Trans. Circuits & Systems II (2000)

    Google Scholar 

  5. Jou, S.J., Wang, H.H.: The Proceedings of International Conference on Computer Design (2000)

    Google Scholar 

  6. Kim, S.M., Chung, J.G., Parhi, K.K.: IEEE Trans. Circuits & Systems II (2003)

    Google Scholar 

  7. Cho, K.J., Lee, K.C., Chung, J.G., Parhi, K.K.: IEEE Trans. VLSI Systems (2004)

    Google Scholar 

  8. Song, M.A., Van, L.D., Huang, T.C., Kuo, S.Y.: IEEE Trans. Circuits & Systems II (2005)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2011 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Cho, KJ., Chung, JG., Kim, HY., Kim, GJ., Kim, DI., Kim, YK. (2011). Fixed-Width Modified Booth Multiplier Design Based on Error Bound Analysis. In: Kim, Th., et al. Multimedia, Computer Graphics and Broadcasting. MulGraB 2011. Communications in Computer and Information Science, vol 263. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-27186-1_32

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-27186-1_32

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-27185-4

  • Online ISBN: 978-3-642-27186-1

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics