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Part of the book series: Intelligent Systems Reference Library ((ISRL,volume 43))

Abstract

This paper describes current achievements in hardware realization of rough sets algorithms in FPGA (Field Programmable Gate Array) logic devices. At the moment, only few ideas and hardware implementations have been created. This chapter is a survey of them.

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References

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Correspondence to Maciej Kopczyński .

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Kopczyński, M., Stepaniuk, J. (2013). Hardware Implementations of Rough Set Methods in Programmable Logic Devices. In: Skowron, A., Suraj, Z. (eds) Rough Sets and Intelligent Systems - Professor Zdzisław Pawlak in Memoriam. Intelligent Systems Reference Library, vol 43. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-30341-8_16

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  • DOI: https://doi.org/10.1007/978-3-642-30341-8_16

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-30340-1

  • Online ISBN: 978-3-642-30341-8

  • eBook Packages: EngineeringEngineering (R0)

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