Abstract
Partitioning is an effective method for synthesis of low power finite state machines (FSM). To make the partitioning more effective power gating can be applied to turn OFF the inactive sub-machine. During transition from the states of one sub-machine to the states of other sub-machine, the supply voltage is required to be turned OFF for one sub-machine and turned ON for other sub-machine. This adjustment of supply voltage needs some amount of time. Hence, it effects the partitioning of FSMs for its power gated implementation as both the sub-machines are ON during this time. In this paper we have considered this issue by developing a new probabilistic power model of the power-gated design of FSM. As effective partitioning and encoding of FSM decides the power consumption of final power gating implementation, in this paper Genetic Algorithm (GA) has been used to solve this integrated problem of both bi-partitioning and encoding. Experimental results obtained show the effectiveness of the approach in terms of total dynamic power consumption, compared to the technique reported in the literature.
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Choudhury, P., Pradhan, S.N. (2012). Power Modeling of Power Gated FSM and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm. In: Rahaman, H., Chattopadhyay, S., Chattopadhyay, S. (eds) Progress in VLSI Design and Test. Lecture Notes in Computer Science, vol 7373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31494-0_3
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DOI: https://doi.org/10.1007/978-3-642-31494-0_3
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