Abstract
The read-write ability of SRAM cells is one of the major concern in nanometer regime. This paper analyzes the stability and performance of asymmetric FinFET based different schematic of 6T SRAM cells. The proposed structure exploits asymmetrical behavior of current to improve read-write stability of SRAM. By exploiting the asymmetricity in proposed structure, contradiction between read and write noise margin (RNM and WNM) is relaxed. The overall improvements in static, read and write noise margins for proposed asymmetric FinFET based independent gate SRAM (IGSRAM) are 28%, 71%, and 31% respectively.
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References
Goel, A., Gupta, S.K., Roy, K.: Asymmetric Drain Spacer Extension (ADSE) FinFETs for Low-Power and Robust SRAMs. IEEE Trans. Electron Devices 58(2), 296–308 (2011)
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© 2012 Springer-Verlag Berlin Heidelberg
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Kaushik, N., Kaushik, B.K., Kaur, D., Majumder, M.K. (2012). Independent Gate SRAM Based on Asymmetric Gate to Source/Drain Overlap-Underlap Device FinFET. In: Rahaman, H., Chattopadhyay, S., Chattopadhyay, S. (eds) Progress in VLSI Design and Test. Lecture Notes in Computer Science, vol 7373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31494-0_48
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DOI: https://doi.org/10.1007/978-3-642-31494-0_48
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-31493-3
Online ISBN: 978-3-642-31494-0
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