Skip to main content
SpringerLink
Log in
Book cover

International Symposium on Automated Technology for Verification and Analysis

ATVA 2012: Automated Technology for Verification and Analysis pp 1–16Cite as

Verification of Computer Switching Networks: An Overview

  • Conference paper

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 7561))

Abstract

Formal verification has seen much success in several domains of hardware and software design. For example, in hardware verification there has been much work in the verification of microprocessors (e.g. [1]) and memory systems (e.g. [2]). Similarly, software verification has seen success in device-drivers (e.g. [3]) and concurrent software (e.g. [4]). The area of network verification, which consists of both hardware and software components, has received relatively less attention. Traditionally, the focus in this domain has been on performance and security, with less emphasis on functional correctness. However, increasing complexity is resulting in increasing functional failures and thus prompting interest in verification of key correctness properties. This paper reviews the formal verification techniques that have been used here thus far, with the goal of understanding the characteristics of the problem domain that are helpful for each of the techniques, as well as those that pose specific challenges. Finally, it highlights some interesting research challenges that need to be addressed in this important emerging domain.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Burch, J.R., Dill, D.L.: Automatic Verification of Pipelined Microprocessor Control. In: Dill, D.L. (ed.) CAV 1994. LNCS, vol. 818, pp. 68–80. Springer, Heidelberg (1994)

    Chapter  Google Scholar 

  2. Clarke, E.M., Grumberg, O., Hiraishi, H., Jha, S., Long, D.E., McMillan, K.L., Ness, L.A.: Verification of the futurebus+ cache coherence protocol. Formal Methods in System Design 6, 217–232 (1995), doi:10.1007/BF01383968

    Article  Google Scholar 

  3. Henzinger, T.A., Jhala, R., Majumdar, R., Sutre, G.: Software Verification with BLAST. In: Ball, T., Rajamani, S.K. (eds.) SPIN 2003. LNCS, vol. 2648, pp. 235–239. Springer, Heidelberg (2003)

    Chapter  Google Scholar 

  4. Musuvathi, M., Qadeer, S., Ball, T., Basler, G., Nainar, P.A., Neamtiu, I.: Finding and reproducing heisenbugs in concurrent programs. In: Proceedings of the 8th USENIX Conference on Operating Systems Design and Implementation OSDI 2008, pp. 267–280. USENIX Association, Berkeley (2008)

    Google Scholar 

  5. Alimi, R., Wang, Y., Yang, Y.R.: Shadow configuration as a network management primitive. SIGCOMM Comput. Commun. Rev. 38(4), 111–122 (2008)

    Article  Google Scholar 

  6. Xie, G.G., Zhan, J., Maltz, D.A., Zhang, H., Greenberg, A., Hjalmtysson, G., Rexford, J.: On static reachability analysis of ip networks. In: INFOCOM Comput. Commun. Societ. Preceedings IEEE, vol. 3 (2005)

    Google Scholar 

  7. Kazemian, P., Varghese, G., McKeown, N.: Header space analysis: static checking for networks. In: Proceedings of the 9th USENIX Conference on Networked Systems Design and Implementation, NSDI 2012, pp. 9–9. USENIX Association, Berkeley (2012)

    Google Scholar 

  8. Al-Shaer, E., Marrero, W., El-Atawy, A., ElBadawi, K.: Network configuration in a box: towards end-to-end verification of network reachability and security. In: 17th IEEE International Conference on Network Protocols, ICNP 2009, pp. 123–132 (October 2009)

    Google Scholar 

  9. Al-Shaer, E., Al-Haj, S.: Flowchecker: configuration analysis and verification of federated openflow infrastructures. In: Proceedings of the 3rd ACM Workshop on Assurable and Usable Security Configuration, SafeConfig 2010, pp. 37–44. ACM, New York (2010)

    Google Scholar 

  10. Mai, H., Khurshid, A., Agarwal, R., Caesar, M., Godfrey, P.B., King, S.T.: Debugging the data plane with anteater. In: Proceedings of the ACM SIGCOMM 2011 Conference, SIGCOMM 2011, pp. 290–301. ACM, New York (2011)

    Google Scholar 

  11. McGeer, R.: Verification of switching network properties using satisfiability. In: ICC Workshop on Software-Defined Networks (June 2012)

    Google Scholar 

  12. Zhang, S.: Model checking/boolean satisfiability in switch network verification and synthesis. Princeton University, Department of Electrical Engineering, Ph.D. Research Seminar Examination Report (May 2012)

    Google Scholar 

  13. McKeown, N., Anderson, T., Balakrishnan, H., Parulkar, G., Peterson, L., Rexford, J., Shenker, S., Turner, J.: Openflow: enabling innovation in campus networks. SIGCOMM Comput. Commun. Rev. 38(2), 69–74 (2008)

    Article  Google Scholar 

  14. Moy, J.: RFC 2328: OSPF Version 2. Technical report, IETF (1998)

    Google Scholar 

  15. Hares, S., Rekhter, Y., Li, T., Addresses, E.: A Border Gateway Protocol 4 (BGP-4). Technical Report 4271, RFC Editor, Fremont, CA, USA (January 2006)

    Google Scholar 

  16. Harrington, D., Presuhn, R., Wijnen, B.: An architecture for describing simple network management protocol (snmp) management frameworks. Technical report, RFC Editor, United States (2002)

    Google Scholar 

  17. Gude, N., Koponen, T., Pettit, J., Pfaff, B., Casado, M., McKeown, N., Shenker, S.: Nox: towards an operating system for networks. SIGCOMM Comput. Commun. Rev. 38(3), 105–110 (2008)

    Article  Google Scholar 

  18. Reitblatt, M., Foster, N., Rexford, J., Walker, D.: Software updates in openflow networks: Change you can believe in. In: Proceedings of HotNets (2011)

    Google Scholar 

  19. Reitblatt, M., Foster, N., Rexford, J., Schlesinger, C., David, W.: Abstractions for network update. SIGCOMM Comput. Commun. Rev. (August 2012)

    Google Scholar 

  20. McGeer, R.: A safe, efficient update protocol for openflow networks. In: Proceedings of Hot SDN (2012)

    Google Scholar 

  21. Sherwood, R., Gibb, G., Yap, K.K., Casado, M., Appenzeller, G., McKeown, N., Parulkar, G.: Can the production network be the testbed. In: OSDI (2010)

    Google Scholar 

  22. Foundation, T.O.N.: The openflow switch specification, http://OpenFlowSwitch.org

  23. Casado, M., McKeown, N.: The virtual network system. In: ACM SIGCSE (2005)

    Google Scholar 

  24. Casado, M., Garfinkel, T., Akella, A., Freedman, M., Boneh, D., McKeown, N., Shenker, S.: Sane: A protection architecture for enterprise networks. In: Usenix Security (2006)

    Google Scholar 

  25. Casado, M., Freedman, M.J., Pettit, J., Luo, J., McKeown, N., Shenker, S.: Ethane: Taking control of the enterprise. In: Proceedings of ACM SIGCOMM (August 2007)

    Google Scholar 

  26. Casado, M., Koponen, T., Moon, D., Shenker, S.: Rethinking packet forwarding hardware. In: Proc. Seventh ACM SIGCOMM HotNets Workshop (2008)

    Google Scholar 

  27. Casado, M., Freedman, M.J., Pettit, J., Luo, J., Gude, N., McKeown, N., Shenker, S.: Rethinking enterprise network control. Transactions on Networking (ToN) 17(4), 1270–1283 (2009)

    Article  Google Scholar 

  28. Casado, M., Koponen, T., Ramanathan, R., Shenker, S.: Virtualizing the network forwarding plane. In: PRESTO (2010)

    Google Scholar 

  29. Loo, B.T., Condie, T., Garofalakis, M., Gay, D.E., Hellerstein, J.M., Maniatis, P., Ramakrishnan, R., Roscoe, T., Stoica, I.: Declarative networking. CACM 52(11), 87–95 (2009)

    Article  Google Scholar 

  30. Hinrichs, T., Gude, N., Casado, M., Mitchell, J., Shenker, S.: Practical declarative network management. In: Proceedings of ACM SIGCOMM Workshop: Research on Enterprise Networking, WREN (2009)

    Google Scholar 

  31. Voellmy, A., Hudak, P.: Nettle: Taking the Sting Out of Programming Network Routers. In: Rocha, R., Launchbury, J. (eds.) PADL 2011. LNCS, vol. 6539, pp. 235–249. Springer, Heidelberg (2011)

    Chapter  Google Scholar 

  32. Emerson, E.A., Halpern, J.Y.: Decision procedures and expressiveness in the temporal logic of branching time. Journal of Computer and System Sciences 30(1), 1–24 (1985)

    Article  MathSciNet  MATH  Google Scholar 

  33. Cimatti, A., Clarke, E., Giunchiglia, E., Giunchiglia, F., Pistore, M., Roveri, M., Sebastiani, R., Tacchella, A.: NuSMV 2: An OpenSource Tool for Symbolic Model Checking. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, pp. 359–364. Springer, Heidelberg (2002)

    Chapter  Google Scholar 

  34. Burch, J., Clarke, E., McMillan, K., Dill, D., Hwang, L.: Symbolic model checking: 1020 states and beyond. Information and Computation 98(2), 142–170 (1992)

    Article  MathSciNet  MATH  Google Scholar 

  35. McMillan, K.L.: Symbolic Model Checking, 1st edn. Kluwer Academic Publishers (1993)

    Google Scholar 

  36. Bryant, R., Seger, C.-J.: Formal Verification of Digital Circuits Using Symbolic Ternary System Models. In: Clarke, E.M., Kurshan, R.P. (eds.) CAV 1990. LNCS, vol. 531, pp. 33–43. Springer, Heidelberg (1991)

    Chapter  Google Scholar 

  37. McGeer, R.: New results on bdd sizes and implications for verification. In: Proceedings of the International Workshop on Logic Synthesis (June 2012)

    Google Scholar 

  38. Devadas, S., Ma, H.K.T., Newton, A.R.: On the verification of sequential machines at differing levels of abstraction. IEEE Trans. on CAD of Integrated Circuits and Systems 7(6), 713–722 (1988)

    Article  Google Scholar 

  39. Emerson, E., Namjoshi, K.: On model checking for non-deterministic infinite-state systems. In: Proceedings of Thirteenth Annual IEEE Symposium on Logic in Computer Science, pp. 70–80 (June 1998)

    Google Scholar 

  40. Emerson, E.A., Sistla, A.P.: Symmetry and model checking. Formal Methods in System Design 9, 105–131 (1996), doi:10.1007/BF00625970

    Article  Google Scholar 

  41. Aloul, F., Sakallah, K., Markov, I.: Efficient symmetry breaking for boolean satisfiability. IEEE Transactions on Computers 55(5), 549–558 (2006)

    Article  Google Scholar 

  42. McGeer, R., Yalagandula, P.: Minimizing rulesets for tcam implementation. In: Proceedings IEEE Infocom (2009)

    Google Scholar 

  43. The floodlight openflow controller, http://floodlight.openflowhub.org/

  44. Foster, N., Harrison, R., Meola, M.L., Freedman, M.J., Rexford, J., Walke, D.: Frenetic: A high-level language for openflow networks. In: ACM PRESTO 2010 (2010)

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Electrical Engineering, Princeton University, Princeton, NJ, USA

    Shuyuan Zhang & Sharad Malik

  2. HP Laboratory, Palo Alto, CA, USA

    Rick McGeer

Authors
  1. Shuyuan Zhang
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Sharad Malik
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Rick McGeer
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Indian Institute of Technology, Computer Science and Engineering, Dept. of Computer Science and Engineering, IIT Bombay, Powai, 400076, Mumbai, Maharashtra, India

    Supratik Chakraborty

  2. Chennai Mathematical Institute, H1, SIPCOT IT Park, Kelambakkam, 603103, Siruseri, Tamil Nadu, India

    Madhavan Mukund

Rights and permissions

Reprints and permissions

Copyright information

© 2012 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Zhang, S., Malik, S., McGeer, R. (2012). Verification of Computer Switching Networks: An Overview. In: Chakraborty, S., Mukund, M. (eds) Automated Technology for Verification and Analysis. ATVA 2012. Lecture Notes in Computer Science, vol 7561. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33386-6_1

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-33386-6_1

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-33385-9

  • Online ISBN: 978-3-642-33386-6

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics

Search

Navigation