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Optimum Hardware-Architecture for Modular Divider in GF(2m) with Chaos as Arbitrary Source Based on ECC

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Global Security, Safety and Sustainability & e-Democracy (e-Democracy 2011, ICGS3 2011)

Abstract

The large-scale proliferation of wireless communications both inside and outside the home-office environment has led to an increased demand for effective and cheap encryption schemes. Now a new chaos based signals as arbitrary source and digital signals as main source make digits for Elliptic curve algorithm by 2 parallel-in (with pipelining), 1parallel-out and 1 serial-out to produce encrypted signals. For computing this scheme in application on MC-DS-CDMA transmitter and receiver, new algorithm of division with the least time consumption, is presented.

This algorithm is implemented in modular division over GF (2m) without any considerable increase in hardware gate count. By considering appropriate circuit configuration, the simulation results are also presented.

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© 2012 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering

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Hosseini, A., Falahati, A. (2012). Optimum Hardware-Architecture for Modular Divider in GF(2m) with Chaos as Arbitrary Source Based on ECC. In: Georgiadis, C.K., Jahankhani, H., Pimenidis, E., Bashroush, R., Al-Nemrat, A. (eds) Global Security, Safety and Sustainability & e-Democracy. e-Democracy ICGS3 2011 2011. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 99. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33448-1_33

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  • DOI: https://doi.org/10.1007/978-3-642-33448-1_33

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-33447-4

  • Online ISBN: 978-3-642-33448-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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