Abstract
Network-on-Chip (NoC) is a promising interconnection solution for systems on chip. Mapping Intellectual Property (IP) cores onto NoC architecture is an important phase of NoC design. It affects heavily the NoC performance. In this paper, we propose a multi-objectives optimization algorithm based on Scatter Search for NoC mapping. We introduce reliability evaluation into NoC mapping in order to achieve high performance and reliable NoC architectures. Experimental results show that our algorithm achieves low power consumption, little communication time, balanced link load and high reliability, compared to other traditional evolutional algorithms.
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Le, Q., Yang, G., Hung, W.N.N., Guo, W. (2012). Reliable NoC Mapping Based on Scatter Search. In: Liu, B., Ma, M., Chang, J. (eds) Information Computing and Applications. ICICA 2012. Lecture Notes in Computer Science, vol 7473. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-34062-8_83
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DOI: https://doi.org/10.1007/978-3-642-34062-8_83
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-34061-1
Online ISBN: 978-3-642-34062-8
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