Abstract
Verilog is a hardware description language (HDL) that has been standardized and widely used in industry. It contains interesting features such as event-driven computation and shared-variable concurrency. This paper considers how the algebraic semantics links with the operational semantics for Verilog. Our approach is to apply the equational and rewriting logic system Maude in exploring the linking theories. Firstly we present the algebraic semantics for Verilog. We introduce the concept of head normal form and every program is expressed as a guarded choice with location status. Secondly we present the strategy of deriving operational semantics from algebraic semantics. Our mechanical approach using Maude can visually show the head normal form of each program, as well as the execution steps of a program based on the derivation strategy. Finally we also mechanize the derived operational semantics. The results mechanized from the second and third exploration indicate that the transition system of the derived operational semantics is the same as the one based on the derivation strategy.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Clavel, M., Durán, F., Eker, S., Lincoln, P., Martí-Oliet, N., Meseguer, J., Talcott, C.: The Maude 2.0 System. In: Nieuwenhuis, R. (ed.) RTA 2003. LNCS, vol. 2706, pp. 76–87. Springer, Heidelberg (2003)
Clavel, M., Durán, F.F., Eker, S., Lincoln, P., Martí-Oliet, N., Meseguer, J., Talcott, C.: Maude Manual (Version 2.6) (January 2011)
Gordon, M.J.C.: The semantic challenge of Verilog HDL. In: Proc. Tenth Annual IEEE Symposium on Logic in Computer Science, pp. 136–145. IEEE Computer Society Press (June 1995)
Gordon, M.J.C.: Relating event and trace semantics of hardware description languages. The Computer Journal 45(1), 27–36 (2002)
He, J., Xu, Q.: An operational semantics of a simulator algorithm. Technical Report 204, UNU/IIST, P.O. Box 3058, Macau SAR, China (2000)
He, J., Zhu, H.: Formalising Verilog. In: Proc. ICECS 2000: IEEE International Conference on Electronics, Circuits and Systems, pp. 412–415. IEEE Computer Society Press (December 2000)
Hoare, C.A.R.: Algebra of concurrent programming. In: Meeting 52 of WG 2.3 (2011)
Hoare, C.A.R., He, J.: Unifying Theories of Programming. Prentice Hall International Series in Computer Science (1998)
IEEE. IEEE Standard Hardware Description Language based on the Verilog Hardware Description Language, IEEE Standard 1364-1995. IEEE (1995)
IEEE. IEEE Standard Hardware Description Language based on the Verilog Hardware Description Language, IEEE Standard 1364-2001. IEEE (2001)
Li, Y., He, J.: Formalising Verilog: Operational semantics and bisimulation. Technical Report 217, UNU/IIST, P.O. Box 3058, Macau SAR, China (November 2000)
Martí-Oliet, N., Meseguer, J.: Rewriting logic as a logical and semantic framework. Electronic Notes in Theoretical Computer Science 4, 190–225 (1996)
Martí-Oliet, N., Meseguer, J.: Rewriting logic: Roadmap and bibliography. Theoretical Computer Science 285(2), 121–154 (2002)
Meseguer, J.: Twenty years of rewriting logic. Journal of Logic and Algebraic Programming (to appear)
Milner, R.: Communication and Concurrency. Prentice Hall International Series in Computer Science (1990)
Milner, R.: Communication and Mobile System: π-calculus. Cambridge University Press (1999)
Nissanke, N.: Realtime Systems. Prentice Hall International Series in Computer Science (1997)
Verdejo, A., Martí-Oliet, N.: Implementing ccs in maude 2. Electronic Notes in Theoretical Computer Science 71, 282–300 (2002)
Zhou, C., Hoare, C.A.R., Ravn, A.P.: A calculus of durations. Information Processing Letters 40(5), 269–276 (1991)
Zhu, H., Bowen, J.P., He, J.: Deriving operational semantics from denotational semantics for Verilog. In: Proc. APSEC 2001: 8th Asia-Pacific Software Engineering Conference, pp. 177–184. IEEE Computer Society Press (December 2001)
Zhu, H., Bowen, J.P., He, J.: From Operational Semantics to Denotational Semantics for Verilog. In: Margaria, T., Melham, T.F. (eds.) CHARME 2001. LNCS, vol. 2144, pp. 449–464. Springer, Heidelberg (2001)
Zhu, H., He, J.: A semantics of Verilog using Duration Calculus. In: Proc. International Conference on Software: Theory and Practice, pp. 421–432 (August 2000)
Zhu, H., He, J., Bowen, J.P.: From algebraic semantics to denotational semantics for verilog. Innovations in Systems and Software Engineering: A NASA Journal 4(4), 341–360 (2008)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2013 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Zhu, H., Liu, P., He, J., Qin, S. (2013). Mechanical Approach to Linking Operational Semantics and Algebraic Semantics for Verilog Using Maude. In: Wolff, B., Gaudel, MC., Feliachi, A. (eds) Unifying Theories of Programming. UTP 2012. Lecture Notes in Computer Science, vol 7681. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-35705-3_8
Download citation
DOI: https://doi.org/10.1007/978-3-642-35705-3_8
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-35704-6
Online ISBN: 978-3-642-35705-3
eBook Packages: Computer ScienceComputer Science (R0)