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An Application-Aware Cache Replacement Policy for Last-Level Caches

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Book cover Architecture of Computing Systems – ARCS 2013 (ARCS 2013)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7767))

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Abstract

Current day multicore processors employ multi-level cache hierarchy with one or two levels of private caches and a shared last-level cache (LLC). Efficient cache replacement policies at LLC are essential for reducing the off-chip memory traffic as well as contention for memory bandwidth. Cache replacement techniques for unicore LLCs may not be efficient for multicore LLCs as multicore LLCs can be shared by applications with varying access behavior, running simultaneously. One application may dominate another by flooding of cache requests and evicting the useful data of the other application.

This paper proposes a new cache replacement policy for shared LLC called Application-aware Cache Replacement (ACR). ACR policy prevents victimizing low-access rate application by a high-access rate application. It dynamically keeps track of maximum life-time of cache lines in shared LLC for each concurrent application and helps in efficient utilization of the cache space. Experimental evaluation of ACR technique for 2-core and 4-core systems using SPEC CPU 2000 and 2006 benchmark suites shows significant speed-up improvement over the least recently used and thread-aware dynamic re-reference interval prediction techniques.

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Warrier, T.S., Anupama, B., Mutyam, M. (2013). An Application-Aware Cache Replacement Policy for Last-Level Caches. In: Kubátová, H., Hochberger, C., Daněk, M., Sick, B. (eds) Architecture of Computing Systems – ARCS 2013. ARCS 2013. Lecture Notes in Computer Science, vol 7767. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36424-2_18

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  • DOI: https://doi.org/10.1007/978-3-642-36424-2_18

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-36423-5

  • Online ISBN: 978-3-642-36424-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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