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Verifying Liveness in Supervised Systems Using UPPAAL and mCRL2

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Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 207))

Abstract

Supervisory control ensures safe coordination of high-level discrete-event system behavior. Supervisory controllers observe discrete-event system behavior, make a decision on allowed activities, and communicate the control signals to the involved parties. Models of such controllers are automatically synthesized from the formal models of the unsupervised system and the specified safety requirements. Traditionally, the supervisory controllers do not ensure that intended behavior is preserved, but only ensure that undersired behavior is precluded. Recent work suggested that ensuring liveness properties during the synthesis procedure is a costly undertaking. Therefore, we augment state-of-the-art synthesis tools to provide for efficient post-synthesis verification. To this end, we interface a model-based systems engineering framework with the state-based model checker UPPAAL and the event-based tool suite mCRL2. We demonstrate the framework on an industrial case study involving coordination of maintenance procedures of a high-end printer. Based on our experiences, we discuss the advantages and disadvantages of the used tools. A comparison is given of the functionality offered by the tools and the extent to which these are useful in our proposed method.

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References

  1. Akesson, K., Fabian, M., Flordal, H., Malik, R.: Supremica - an integrated environment for verification, synthesis and simulation of discrete event systems. In: Proceedings of WODES 2006, pp. 384–385. IEEE (2006)

    Google Scholar 

  2. Baeten, J.C.M., van de Mortel-Fronczak, J.M., Rooda, J.E.: Integration of Supervisory Control Synthesis in Model-Based Systems Engineering. In: Proceedings of ETAI/COSY 2011, pp. 167–178. IEEE (2011)

    Google Scholar 

  3. Brandin, B.A., Malik, R., Malik, P.: Incremental verification and synthesis of discrete-event systems guided by counter examples. IEEE Transactions on Control Systems Technology 12(3), 387–401 (2004)

    Article  Google Scholar 

  4. Cassandras, C., Lafortune, S.: Introduction to discrete event systems. Kluwer Academic Publishers (2004)

    Google Scholar 

  5. Clarke, E.M., Emerson, E.A., Sistla, A.P.: Automatic verification of finite-state concurrent systems using temporal logic specifications. ACM Transactions on Programming Languages and System 8(2), 244–263 (1986)

    Article  MATH  Google Scholar 

  6. D’Ippolito, N.R., Braberman, V., Piterman, N., Uchitel, S.: Synthesis of live behaviour models. In: Proceedings of SIGSOFT 2010, pp. 77–86. ACM (2010)

    Google Scholar 

  7. Groote, J.F., Mathijssen, A.H.J., Reniers, M.A., Usenko, Y.S., van Weerdenburg, M.J.: Analysis of distributed systems with mCRL2. In: Process Algebra for Parallel and Distributed Processing, pp. 99–128. Chapman & Hall (2009)

    Google Scholar 

  8. Groote, J.F., Reniers, M.A.: Algebraic process verification. In: Handbook of Process Algebra, ch. 17, pp. 1151–1208. Elsevier (2001)

    Google Scholar 

  9. Jiang, S., Kumar, R.: Supervisory control of discrete event systems with CTL* temporal logic specifications. SIAM Journal on Control and Optimization 44(6), 2079–2103 (2006)

    Article  MathSciNet  MATH  Google Scholar 

  10. Larsen, K.G., Pettersson, P., Yi, W.: Uppaal in a Nutshell. International Journal on Software Tools for Technology Transfer 1(1-2), 134–152 (1997)

    Article  MATH  Google Scholar 

  11. Leveson, N.: The challenge of building process-control software. IEEE Software 7(6), 55–62 (1990)

    Article  Google Scholar 

  12. Markovski, J.: Supremica2{UPPAAL, mCRL2} and demo models (2012), http://sites.google.com/site/jasenmarkovski

  13. Markovski, J., Jacobs, K.G.M., van Beek, D.A., Somers, L.J.A.M., Rooda, J.E.: Coordination of resources using generalized state-based requirements. In: Proceedings of WODES 2010, pp. 300–305. IFAC (2010)

    Google Scholar 

  14. Markovski, J., Reniers, M.A.: An integrated state- and event-based framework for verifying liveness in supervised systems. In: Proceedings of ICARCV 2012. IEEE (2012) (to appear)

    Google Scholar 

  15. Piterman, N., Pnueli, A., Sa’ar, Y.: Synthesis of reactive(1) designs. In: Emerson, E.A., Namjoshi, K.S. (eds.) VMCAI 2006. LNCS, vol. 3855, pp. 364–380. Springer, Heidelberg (2006)

    Chapter  Google Scholar 

  16. Ramadge, P.J., Wonham, W.M.: Supervisory control of a class of discrete-event processes. SIAM Journal on Control and Optimization 25(1), 206–230 (1987)

    Article  MathSciNet  MATH  Google Scholar 

  17. Seow, K.T.: Integrating temporal logic as a state-based specification language for discrete-event control design in finite automata. IEEE Transactions on Automation Science and Engineering 4(3), 451–464 (2007)

    Article  Google Scholar 

  18. Song, R., Leduc, R.: Symbolic synthesis and verification of hierarchical interface-based supervisory control. In: Proceedings of WODES 2006, pp. 419–426. IEEE (2006)

    Google Scholar 

  19. Voronov, A., Akesson, K.: Verification of process operations using model checking. In: Proceedings of CASE 2009, pp. 415–420. IEEE (2009)

    Google Scholar 

  20. Ziller, R., Schneider, K.: Combining supervisor synthesis and model checking. ACM Transactions on Embedded Computing Systems 4(2), 331–362 (2005)

    Article  Google Scholar 

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Correspondence to Jasen Markovski .

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Markovski, J., Reniers, M.A. (2013). Verifying Liveness in Supervised Systems Using UPPAAL and mCRL2. In: Markovski, S., Gusev, M. (eds) ICT Innovations 2012. ICT Innovations 2012. Advances in Intelligent Systems and Computing, vol 207. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-37169-1_29

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  • DOI: https://doi.org/10.1007/978-3-642-37169-1_29

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-37168-4

  • Online ISBN: 978-3-642-37169-1

  • eBook Packages: EngineeringEngineering (R0)

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