Design and Implementation of Stereo Vision Systems Based on FPGA for 3D Information

Abstract

The purpose of this paper is to utilize Field Programmable Gate Array (FPGA) to perform stereo vision distance detection. However, the stereo vision built by two cameras makes memory space lacking and image process slow under the constraints of FPGA application. In this paper, efficient memory space allocation and hardware calculation for stereo vision detection built in a System on a Programmable Chip (SOPC) based on FPGA are proposed. The hardware for stereo vision distance calculation includes the processing for the images of gray, binary, dilation, erosion, etc, and image geometry method for the vision distance through information of phase differences between two lenses. In addition, the simple hardware algorithm of background image subtraction to capture an object image from a series of image frames is also included. The totally hardware to perform stereo vision distance detection is difficult implementation, but firmware (some calculation in software) is flexible and quick to develop. Therefore, the performance of stereo vision distance detection according to hardware and firmware is compared. Finally, the distance calculation between objects and the lenses is demonstrated by practical experiments.