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SAT-Based Bounded Model Checking for RTECTL and Simply-Timed Systems

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Computer Performance Engineering (EPEW 2013)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 8168))

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Abstract

We report on a SAT-based bounded model checking (BMC) method for simply-timed systems (i.e., Kripke models where transitions carry a duration, which is an arbitrary natural number) generated by simply-timed automata with discrete data, and properties expressed in the existential fragment of a soft real-time temporal logic (RTECTL). In particular, since in BMC both the system model and the checked property are translated into a Boolean formula to be analysed by a SAT-solver, we introduce a new Boolean encoding of the RTECTL formulae that is particularly optimized for managing quantitative metric temporal operators, typically found in properties of soft real-time systems (simply-timed systems). The proposed BMC algorithm is implemented as a new module of VerICS, and evaluated by means of two scalable scenarios.

Partly supported by National Science Centre under the grant No. 2011/01/B/ST6/05317

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Woźna-Szcześniak, B., Zbrzezny, A., Zbrzezny, A. (2013). SAT-Based Bounded Model Checking for RTECTL and Simply-Timed Systems. In: Balsamo, M.S., Knottenbelt, W.J., Marin, A. (eds) Computer Performance Engineering. EPEW 2013. Lecture Notes in Computer Science, vol 8168. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-40725-3_26

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  • DOI: https://doi.org/10.1007/978-3-642-40725-3_26

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-40724-6

  • Online ISBN: 978-3-642-40725-3

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