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Error Modeling of Hardware-in-the-Loop Simulation System and Its Influence Analysis for a Certain Missile

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Part of the book series: Communications in Computer and Information Science ((CCIS,volume 402))

Abstract

Hardware-in-the-loop simulation is necessary for the development of missile’s flight control system. The influence of the simulation equipment errors to simulation results cannot be ignored. This paper introduces both the composition of hardware-in-the-loop simulation system and the clock synchronization strategy in particular for a certain missile. Major errors, which mostly affect the precision of simulation, are studied. Through theoretical derivation and experimental verification, the error models of communication time delay, three-axis rotary table, load simulator and data acquisition are established. Finally, based on mathematical simulation the influence of errors on simulation results is confirmed, and the validity of the error models is verified by contrast with hardware-in-the-loop simulation test results. The experimental results show that each error model can meet the demand of the simulation accuracy analysis. It can provide the theory basis for analysis, measurement and error compensation for hardware-in-the-loop simulation system.

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© 2013 Springer-Verlag Berlin Heidelberg

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Chang, Xf., Wan, Sz., Fu, Wx., Yan, J. (2013). Error Modeling of Hardware-in-the-Loop Simulation System and Its Influence Analysis for a Certain Missile. In: Tan, G., Yeo, G.K., Turner, S.J., Teo, Y.M. (eds) AsiaSim 2013. AsiaSim 2013. Communications in Computer and Information Science, vol 402. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-45037-2_16

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  • DOI: https://doi.org/10.1007/978-3-642-45037-2_16

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-45036-5

  • Online ISBN: 978-3-642-45037-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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