Abstract
A methodology for specifying complex hierarchical modules is presented. An IC designer with minimal software background is able to quickly and easily specify the structure of a parameterizable module by means of an abstract circuit description for each component in the hierarchical design. In conjunction with Siemens’ Generator Development Environment [1], this description allows the automatic generation of a structural netlist representation for a particular module configuration. All further circuit representations (e.g. physical and behavioral) refer to the structural representation for assembly or verification purposes. A register-file module generator capable of generating connection-validated mask layout as well as a transistor netlist has been developesd to demonstrate the power of the methodology.
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References
Siemens AG, 1990. “GDE: A Development Environment for Module Generators and Related Design Tools”, (report in preparation).
Meyer, E.L., March 1987. “On Module Generation,” VLSI Systems Design.
Gajski, D., and Thomas, D., 1988. “Introduction to Silicon Compilation,” in Silicon Compilation ( D. Gajski, ed.), Addison-Wesley Publishing Company, Inc.
Burich, M.R., 1988. “Design of Module Generators and Silicon Compilers,” in Silicon Compilation ( D. Gajski, ed.), Addison-Wesley Publishing Company, Inc.
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© 1990 Springer-Verlag Berlin Heidelberg
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Tovey, D., Valdivia, V. (1990). A Methodology for Hierarchical Module Generator Specification. In: Reusch, B. (eds) Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme. Informatik—Fachberichte, vol 255. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-84304-4_10
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DOI: https://doi.org/10.1007/978-3-642-84304-4_10
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-53163-0
Online ISBN: 978-3-642-84304-4
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