Abstract
The allocation task in high level synthesis systems maps operations of a behavioural description to functional units and determines the number of registers, multiplexers and wires. Although the number of multiplexers and wires is minimized, a rather large amount of space is used for the individual connections between the functional units. We reduce this space drastically by generating partitioned busses. For this purpose a parameterized and powerful bus architecture is defined. A method which partitions a data flow graph to allow a bus oriented design and a new allocation method are presented in this paper. First experiments with this approach were successful and lead to very small designs.
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© 1990 Springer-Verlag Berlin Heidelberg
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Ewering, C. (1990). A New Allocation Method for the Synthesis of Partitioned Busses. In: Reusch, B. (eds) Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme. Informatik—Fachberichte, vol 255. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-84304-4_11
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DOI: https://doi.org/10.1007/978-3-642-84304-4_11
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-53163-0
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