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Artificial Neural Nets and Genetic Algorithms pp 71–77Cite as

One-Chip Evolvable Hardware: 1C-EHW

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Abstract

This paper aims at stimulating discussion and research into a new concept called ‘one-chip evolvable hardware (1C-EHW)’ by proposing a generic architecture and methodology to generate the ultimate in evolvable hardware speed, where all the evolvable hardware components are placed on a single chip.

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References

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Author information

Authors and Affiliations

  1. Brain Builder Group, Evolutionary Systems Department, ATR Human Information Processing Research Laboratories, 2-2 Hikaridai, Seika-cho, Soraku-gun, Kansai Science City, Kyoto 619-02, Japan

    H. de Garis

Authors
  1. H. de Garis
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© 1998 Springer-Verlag Wien

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de Garis, H. (1998). One-Chip Evolvable Hardware: 1C-EHW. In: Artificial Neural Nets and Genetic Algorithms. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6492-1_16

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  • DOI: https://doi.org/10.1007/978-3-7091-6492-1_16

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-211-83087-1

  • Online ISBN: 978-3-7091-6492-1

  • eBook Packages: Springer Book Archive

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