Abstract
Hardware/Software Codesign (HSCD) is an integral part of modern Electronic System Level (ESL) design flows. This chapter will review important aspects of hardware/software codesign flows, summarize the historical evolution of codesign techniques, and subsequently summarize each of its major branches of research and achievements that later will be presented in detail by different parts of this Handbook of Hardware/Software Codesign.
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- ASIC:
-
Application-Specific Integrated Circuit
- DES:
-
Discrete Event Simulation
- DSE:
-
Design Space Exploration
- EA:
-
Evolutionary Algorithm
- EDA:
-
Electronic Design Automation
- ESL:
-
Electronic System Level
- ForSyDe:
-
Formal System Design
- FSM:
-
Finite-State Machine
- GA:
-
Genetic Algorithm
- HSCD:
-
Hardware/Software Codesign
- HW:
-
Hardware
- ILP:
-
Integer Linear Program
- IP:
-
Intellectual Property
- ISA:
-
Instruction-Set Architecture
- KPN:
-
Kahn Process Network
- MARTE:
-
Modeling and Analysis of Real-Time Embedded Systems
- MoC:
-
Model of Computation
- MPSoC:
-
Multi-Processor System-on-Chip
- OOO PDES:
-
Out-of-Order Parallel Discrete Event Simulation
- OS:
-
Operating System
- PB:
-
Pseudo-Boolean
- PDES:
-
Parallel Discrete Event Simulation
- PN:
-
Process Network
- SDF:
-
Synchronous Data Flow
- SIMD:
-
Single Instruction, Multiple Data
- SLDL:
-
System-Level Description Language
- SoC:
-
System-on-Chip
- SW:
-
Software
- SysteMoC:
-
SystemC Models of Computation
- TLM:
-
Transaction-Level Model
- UML:
-
Unified Modeling Language
- VLIW:
-
Very Long Instruction Word
- VP:
-
Virtual Prototype
- WCET:
-
Worst-Case Execution Time
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Ha, S. et al. (2017). Introduction to Hardware/Software Codesign. In: Ha, S., Teich, J. (eds) Handbook of Hardware/Software Codesign. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-7267-9_41
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