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Simulating Synthesized Automata from Decentralized Specifications in LTL

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Book cover Frontier and Innovation in Future Computing and Communications

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 301))

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Abstract

In this paper, we present a technique for simulating the synthesized automata from decentralized specifications in linear temporal logic (LTL). Each automaton is synthesized from individual specifications written by generalized reactivity called GR(1) formula which is a restricted fragment of LTL. GR(1) specifications have a possibility of including mistakes so that it has to be validated. This paper describes the validation technique for simulating synthesized automata. As the result, we found out an inconsistent behavior of specifications.

This work was supported in part by the GRRC (Gyeonggi Regional Research Center) program of Gyeonggi Province. [2013-0548, Developing and Industrializing Core-Technologies for Social Services Convergence Platforms].

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References

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Correspondence to Ryoungkwo Kwon .

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© 2014 Springer Science+Business Media Dordrecht

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Kwon, R., Kwon, G. (2014). Simulating Synthesized Automata from Decentralized Specifications in LTL. In: Park, J., Zomaya, A., Jeong, HY., Obaidat, M. (eds) Frontier and Innovation in Future Computing and Communications. Lecture Notes in Electrical Engineering, vol 301. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-8798-7_52

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  • DOI: https://doi.org/10.1007/978-94-017-8798-7_52

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  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-94-017-8797-0

  • Online ISBN: 978-94-017-8798-7

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