Abstract
This paper presents a new approach for simulating single analog faults in linear analog circuits modeled in MATLAB/Simulink environment. The proposed approach consists of namely, modeling fault free, and faulty analog circuits in MATLAB/Simulink environment using signal flow graph, simulating both models applying an input test stimulus and identifying the presence of faults by comparing the maximum error voltage measured at the output with a predefined threshold. The parametric faults are modeled in terms of component tolerances. Apart from this, catastrophic faults are also considered in terms of short and open faults. The proposed approach initially identifies the type of fault to be simulated. Based on fault type, it builds the signal flow graph (SFG) of the faulty circuit. We have also shown that parametric faults are sensitive to frequency of the input test sinusoid. Our proposed approach exploits ‘PSpice® Advanced Sensitivity Analysis’ which identifies less sensitive parametric faults at a given frequency of input sinusoid. The effectiveness of the proposed method is verified by fault modeling and fault simulation of a biquadratic and leapfrog filter circuit. The proposed fault simulation method provides a speedup over the traditional circuit simulator like PSPICE.
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Bhattacharya, R., Ragamai, S.H.M., Kumar, S. (2017). SFG Based Fault Simulation of Linear Analog Circuits Using Fault Classification and Sensitivity Analysis. In: Kaushik, B., Dasgupta, S., Singh, V. (eds) VLSI Design and Test. VDAT 2017. Communications in Computer and Information Science, vol 711. Springer, Singapore. https://doi.org/10.1007/978-981-10-7470-7_19
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DOI: https://doi.org/10.1007/978-981-10-7470-7_19
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