Skip to main content

A 31 ppm/\(^{\circ }\)C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier

  • Conference paper
  • First Online:

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 892))

Abstract

Often Bandgap Reference performance limits the SNR of the bio-medical transceiver, hence sensitivity. In this paper, conventional beta multiplier has been explored to design a new low voltage pure CMOS bandgap architecture, which avoids op-amps and resistors, hence very less mismatch and area. Line sensitivity has been improved by adding an extra gain stage in the circuit. The circuit implementation of the proposed technique was done in 65 nm TSMC CMOS technology to generate 460 mV output voltage. The minimum operating voltage of the circuit is 650 mV. Post-layout simulation results are as follows, 31 ppm/\(^{\circ }\)C temperature coefficient against temperature variation of −40\(^{\circ }\) to 125 \(^{\circ }\)C, 0.5% regulation against supply variation of 0.65−1 V and 0.42% PVT variation. Circuit draws 2.3 A current from 650 mV from power-supply. The proposed band gap reference occupies 0.00144 mm\(^{2}\) silicon area.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

References

  1. De Vita, G., Iannaccone, G.: A sub-1-V, 10 ppm/\(^{\circ }\)C, nanopower voltage reference generator. IEEE J. Solid-State Circuits 42(7), 1536–1542 (2007)

    Article  Google Scholar 

  2. Brokaw, A.P.: A simple three-terminal IC bandgap reference. IEEE J. Solid-State Circuits SC–9, 388–393 (1974)

    Article  Google Scholar 

  3. Razavi, B.: Design of Analog CMOS Integrated Circuits. McGraw-Hill, New Work (2001)

    Google Scholar 

  4. Malcovati, P., Maloberti, F., Fiocchi, C., Pruzzi, M.: Curvature-compensated BiCMOS bandgap with 1-V supply voltage. IEEE J. Solid State Circuits 36, 1076–1081 (2001)

    Article  Google Scholar 

  5. Annema, A.-J.: Low-power bandgap references feature DTMOSTs. IEEE J. Solid-State Circuits 34, 949–955 (1999)

    Article  Google Scholar 

  6. Neuteboom, N., Kup, B.M.J., Janssens, J.: A DSP-based hearing instrument IC. IEEE J. Solid-State Circuits 32, 1790–1806 (1997)

    Article  Google Scholar 

  7. Banba, H., et al.: A CMOS bandgap reference circuit with sub-1-V operation. IEEE J. Solid-State Circuits 34, 670–674 (1999)

    Article  Google Scholar 

  8. Nagulapalli, R., Hayatleh, K.: A 0.6 V MOS-only voltage reference for biomedical applications with 40 ppm/\(^{\circ }\)C temperature drift. J. Circuits Syst. Comput. 27(8), 1850128 (2018)

    Article  Google Scholar 

  9. Nagulapalli, R., et al.: J. Circuit Syst. Comp. https://doi.org/10.1142/S0218126618501281

    Article  Google Scholar 

  10. Liu, S., Baker, R.J.: Process and temperature performance of a CMOS beta-multiplier voltage reference. In: Proceedings of IEEE MWSCAS 1998, pp. 33–36, August 1998

    Google Scholar 

  11. Nicolson, S., Khoman, P.: Improvements in biasing and compensation of CMOS opamps. In: Proceedings of ISCAS, vol. 1, pp. 23–26, May 2004

    Google Scholar 

  12. Sansen, W.M.: Analog Design Essentials. Springer, Boston (2006). https://doi.org/10.1007/b135984. ISBN 978-0-387-25746-4

    Book  Google Scholar 

  13. Nagulapalli, R., Hayatleh, K., Barker, S., Zourob, S., Yassine, N., Sridevi, S.: A microwatt low voltage bandgap reference for bio-medical applications. In: 2017 International Conference on Recent Advances in Electronics and Communication Technology (ICRAECT), pp. 61–65 (2017)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to B. Naresh Kumar Reddy .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2019 Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Nagulapalli, R., Hayatleh, K., Barker, S., Zourob, S., Yassine, N., Naresh Kumar Reddy, B. (2019). A 31 ppm/\(^{\circ }\)C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier. In: Rajaram, S., Balamurugan, N., Gracia Nirmala Rani, D., Singh, V. (eds) VLSI Design and Test. VDAT 2018. Communications in Computer and Information Science, vol 892. Springer, Singapore. https://doi.org/10.1007/978-981-13-5950-7_9

Download citation

  • DOI: https://doi.org/10.1007/978-981-13-5950-7_9

  • Published:

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-13-5949-1

  • Online ISBN: 978-981-13-5950-7

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics