Abstract
This chapter discusses the HI-UX/MPP Series architecture, developed by Hitachi for massively parallel supercomputers, including an implementation overview, improvements, positive and negative results, and lessons learned. HI-UX/MPP is composed of a Mach 3.0 microkernel (Mach) with the minimal functionality required to run applications, and an OSF/1 Unix server, which provides Unix functionality. HI-UX/MPP 02-00 for the SR2201 used a pure microkernel architecture, with compute nodes running only Mach due to small memory and processor resources. HI-UX/MPP 02-00 achieved operation of a 2,048-node computer as a single system, using a kernel with low OS noise and able to utilize computing resources efficiently. HI-UX/MPP 03-00 for the SR8000 improved Unix performance by placing Mach and an OSF/1 Unix server in the same address space and caching Unix functionality on compute nodes. It also reduced OS noise by using a dedicated OS processor. For the SR11000, AIX from IBM was used as the main OS, but a Hybrid OS was configured, with Mach implemented over AIX and running the HSFS distributed parallel files system from OSF/1 Unix. This showed that a specialized OS could be run over a general OS at low cost.
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Acknowledgements
The author would like to thank our Hitachi colleagues who provided the document, specifically Naonobu Sukegawa, Yoshiko Nagasaka, Toshiyuki Ukai, Masamichi Okajima, Kazumasa Tobe, Fujio Fujita, Tsuneo Iida, Masaaki Iwasaki, Yoshiko Yasuda, Hiroaki Fujii, Katsuyoshi Kitai, Yasushi Inagami, Kenichi Kasai.
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Shimizu, M. (2019). Hitachi HI-UX/MPP Series. In: Gerofi, B., Ishikawa, Y., Riesen, R., Wisniewski, R.W. (eds) Operating Systems for Supercomputers and High Performance Computing. High-Performance Computing Series, vol 1. Springer, Singapore. https://doi.org/10.1007/978-981-13-6624-6_4
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